| 1 | /*
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| 2 | * ide.h
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| 3 | *
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| 4 | * IDE driver interface
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| 5 | *
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| 6 | * This file is part of the w32api package.
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| 7 | *
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| 8 | * Contributors:
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| 9 | * Created by Hervé Poussineau <hpoussin@reactos.org>
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| 10 | *
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| 11 | * THIS SOFTWARE IS NOT COPYRIGHTED
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| 12 | *
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| 13 | * This source code is offered for use in the public domain. You may
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| 14 | * use, modify or distribute it freely.
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| 15 | *
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| 16 | * This code is distributed in the hope that it will be useful but
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| 17 | * WITHOUT ANY WARRANTY. ALL WARRANTIES, EXPRESS OR IMPLIED ARE HEREBY
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| 18 | * DISCLAIMED. This includes but is not limited to warranties of
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| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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| 20 | *
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| 21 | */
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| 22 |
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| 23 | #ifndef __IDE_H
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| 24 | #define __IDE_H
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| 25 |
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| 26 | #ifdef __cplusplus
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| 27 | extern "C" {
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| 28 | #endif
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| 29 |
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| 30 | #define MAX_IDE_CHANNEL 2
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| 31 | #define MAX_IDE_LINE 2
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| 32 | #define MAX_IDE_DEVICE 2
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| 33 |
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| 34 | #include <pshpack1.h>
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| 35 | typedef struct _IDENTIFY_DATA {
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| 36 | USHORT GeneralConfiguration; /* 00 */
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| 37 | USHORT NumCylinders; /* 02 */
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| 38 | USHORT Reserved1; /* 04 */
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| 39 | USHORT NumHeads; /* 06 */
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| 40 | USHORT UnformattedBytesPerTrack; /* 08 */
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| 41 | USHORT UnformattedBytesPerSector; /* 10 */
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| 42 | USHORT NumSectorsPerTrack; /* 12 */
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| 43 | USHORT VendorUnique1[3]; /* 14 */
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| 44 | UCHAR SerialNumber[20]; /* 20 */
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| 45 | USHORT BufferType; /* 40 */
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| 46 | USHORT BufferSectorSize; /* 42 */
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| 47 | USHORT NumberOfEccBytes; /* 44 */
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| 48 | UCHAR FirmwareRevision[8]; /* 46 */
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| 49 | UCHAR ModelNumber[40]; /* 54 */
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| 50 | UCHAR MaximumBlockTransfer; /* 94 */
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| 51 | UCHAR VendorUnique2; /* 95 */
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| 52 | USHORT DoubleWordIo; /* 96 */
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| 53 | USHORT Capabilities; /* 98 */
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| 54 | USHORT Reserved2; /* 100 */
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| 55 | UCHAR VendorUnique3; /* 102 */
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| 56 | UCHAR PioCycleTimingMode; /* 103 */
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| 57 | UCHAR VendorUnique4; /* 104 */
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| 58 | UCHAR DmaCycleTimingMode; /* 105 */
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| 59 | USHORT TranslationFieldsValid:3; /* 106 */
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| 60 | USHORT Reserved3:13; /* - */
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| 61 | USHORT NumberOfCurrentCylinders; /* 108 */
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| 62 | USHORT NumberOfCurrentHeads; /* 110 */
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| 63 | USHORT CurrentSectorsPerTrack; /* 112 */
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| 64 | ULONG CurrentSectorCapacity; /* 114 */
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| 65 | USHORT CurrentMultiSectorSetting; /* 118 */
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| 66 | ULONG UserAddressableSectors; /* 120 */
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| 67 | USHORT SingleWordDMASupport:8; /* 124 */
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| 68 | USHORT SingleWordDMAActive:8; /* - */
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| 69 | USHORT MultiWordDMASupport:8; /* 126 */
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| 70 | USHORT MultiWordDMAActive:8; /* - */
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| 71 | USHORT AdvancedPIOModes:8; /* 128 */
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| 72 | USHORT Reserved4:8; /* - */
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| 73 | USHORT MinimumMWXferCycleTime; /* 130 */
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| 74 | USHORT RecommendedMWXferCycleTime; /* 132 */
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| 75 | USHORT MinimumPIOCycleTime; /* 134 */
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| 76 | USHORT MinimumPIOCycleTimeIORDY; /* 136 */
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| 77 | USHORT Reserved5[11]; /* 138 */
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| 78 | USHORT MajorRevision; /* 160 */
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| 79 | USHORT MinorRevision; /* 162 */
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| 80 | USHORT Reserved6; /* 164 */
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| 81 | USHORT CommandSetSupport; /* 166 */
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| 82 | USHORT Reserved6a[2]; /* 168 */
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| 83 | USHORT CommandSetActive; /* 172 */
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| 84 | USHORT Reserved6b; /* 174 */
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| 85 | USHORT UltraDMASupport:8; /* 176 */
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| 86 | USHORT UltraDMAActive:8; /* - */
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| 87 | USHORT Reserved7[11]; /* 178 */
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| 88 | ULONG Max48BitLBA[2]; /* 200 */
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| 89 | USHORT Reserved7a[22]; /* 208 */
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| 90 | USHORT LastLun:3; /* 252 */
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| 91 | USHORT Reserved8:13; /* - */
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| 92 | USHORT MediaStatusNotification:2; /* 254 */
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| 93 | USHORT Reserved9:6; /* - */
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| 94 | USHORT DeviceWriteProtect:1; /* - */
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| 95 | USHORT Reserved10:7; /* - */
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| 96 | USHORT Reserved11[128]; /* 256 */
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| 97 | } IDENTIFY_DATA, *PIDENTIFY_DATA;
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| 98 |
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| 99 | typedef struct _EXTENDED_IDENTIFY_DATA {
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| 100 | USHORT GeneralConfiguration; /* 00 */
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| 101 | USHORT NumCylinders; /* 02 */
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| 102 | USHORT Reserved1; /* 04 */
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| 103 | USHORT NumHeads; /* 06 */
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| 104 | USHORT UnformattedBytesPerTrack; /* 08 */
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| 105 | USHORT UnformattedBytesPerSector; /* 10 */
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| 106 | USHORT NumSectorsPerTrack; /* 12 */
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| 107 | __GNU_EXTENSION union
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| 108 | {
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| 109 | USHORT VendorUnique1[3]; /* 14 */
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| 110 | struct
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| 111 | {
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| 112 | UCHAR InterSectorGap; /* 14 */
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| 113 | UCHAR InterSectorGapSize; /* - */
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| 114 | UCHAR Reserved16; /* 16 */
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| 115 | UCHAR BytesInPLO; /* - */
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| 116 | USHORT VendorUniqueCnt; /* 18 */
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| 117 | } u;
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| 118 | };
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| 119 | UCHAR SerialNumber[20]; /* 20 */
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| 120 | USHORT BufferType; /* 40 */
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| 121 | USHORT BufferSectorSize; /* 42 */
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| 122 | USHORT NumberOfEccBytes; /* 44 */
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| 123 | UCHAR FirmwareRevision[8]; /* 46 */
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| 124 | UCHAR ModelNumber[40]; /* 54 */
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| 125 | UCHAR MaximumBlockTransfer; /* 94 */
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| 126 | UCHAR VendorUnique2; /* 95 */
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| 127 | USHORT DoubleWordIo; /* 96 */
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| 128 | USHORT Capabilities; /* 98 */
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| 129 | USHORT Reserved2; /* 100 */
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| 130 | UCHAR VendorUnique3; /* 102 */
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| 131 | UCHAR PioCycleTimingMode; /* 103 */
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| 132 | UCHAR VendorUnique4; /* 104 */
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| 133 | UCHAR DmaCycleTimingMode; /* 105 */
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| 134 | USHORT TranslationFieldsValid:3; /* 106 */
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| 135 | USHORT Reserved3:13; /* - */
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| 136 | USHORT NumberOfCurrentCylinders; /* 108 */
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| 137 | USHORT NumberOfCurrentHeads; /* 110 */
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| 138 | USHORT CurrentSectorsPerTrack; /* 112 */
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| 139 | ULONG CurrentSectorCapacity; /* 114 */
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| 140 | USHORT CurrentMultiSectorSetting; /* 118 */
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| 141 | ULONG UserAddressableSectors; /* 120 */
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| 142 | USHORT SingleWordDMASupport:8; /* 124 */
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| 143 | USHORT SingleWordDMAActive:8; /* - */
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| 144 | USHORT MultiWordDMASupport:8; /* 126 */
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| 145 | USHORT MultiWordDMAActive:8; /* - */
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| 146 | USHORT AdvancedPIOModes:8; /* 128 */
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| 147 | USHORT Reserved4:8; /* - */
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| 148 | USHORT MinimumMWXferCycleTime; /* 130 */
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| 149 | USHORT RecommendedMWXferCycleTime; /* 132 */
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| 150 | USHORT MinimumPIOCycleTime; /* 134 */
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| 151 | USHORT MinimumPIOCycleTimeIORDY; /* 136 */
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| 152 | USHORT Reserved5[11]; /* 138 */
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| 153 | USHORT MajorRevision; /* 160 */
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| 154 | USHORT MinorRevision; /* 162 */
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| 155 | USHORT Reserved6; /* 164 */
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| 156 | USHORT CommandSetSupport; /* 166 */
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| 157 | USHORT Reserved6a[2]; /* 168 */
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| 158 | USHORT CommandSetActive; /* 172 */
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| 159 | USHORT Reserved6b; /* 174 */
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| 160 | USHORT UltraDMASupport:8; /* 176 */
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| 161 | USHORT UltraDMAActive:8; /* - */
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| 162 | USHORT Reserved7[11]; /* 178 */
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| 163 | ULONG Max48BitLBA[2]; /* 200 */
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| 164 | USHORT Reserved7a[22]; /* 208 */
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| 165 | USHORT LastLun:3; /* 252 */
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| 166 | USHORT Reserved8:13; /* - */
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| 167 | USHORT MediaStatusNotification:2; /* 254 */
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| 168 | USHORT Reserved9:6; /* - */
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| 169 | USHORT DeviceWriteProtect:1; /* - */
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| 170 | USHORT Reserved10:7; /* - */
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| 171 | USHORT Reserved11[128]; /* 256 */
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| 172 | } EXTENDED_IDENTIFY_DATA, *PEXTENDED_IDENTIFY_DATA;
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| 173 | #include <poppack.h>
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| 174 |
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| 175 | typedef struct _PCIIDE_TRANSFER_MODE_SELECT
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| 176 | {
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| 177 | ULONG Channel;
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| 178 | BOOLEAN DevicePresent[MAX_IDE_DEVICE * MAX_IDE_LINE];
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| 179 | BOOLEAN FixedDisk[MAX_IDE_DEVICE * MAX_IDE_LINE];
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| 180 | BOOLEAN IoReadySupported[MAX_IDE_DEVICE * MAX_IDE_LINE];
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| 181 | ULONG DeviceTransferModeSupported[MAX_IDE_DEVICE * MAX_IDE_LINE];
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| 182 | ULONG BestPioCycleTime[MAX_IDE_DEVICE * MAX_IDE_LINE];
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| 183 | ULONG BestSwDmaCycleTime[MAX_IDE_DEVICE * MAX_IDE_LINE];
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| 184 | ULONG BestMwDmaCycleTime[MAX_IDE_DEVICE * MAX_IDE_LINE];
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| 185 | ULONG BestUDmaCycleTime[MAX_IDE_DEVICE * MAX_IDE_LINE];
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| 186 | ULONG DeviceTransferModeCurrent[MAX_IDE_DEVICE * MAX_IDE_LINE];
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| 187 | ULONG UserChoiceTransferMode[MAX_IDE_DEVICE * MAX_IDE_LINE];
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| 188 | ULONG EnableUDMA66;
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| 189 | IDENTIFY_DATA IdentifyData[MAX_IDE_DEVICE];
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| 190 | ULONG DeviceTransferModeSelected[MAX_IDE_DEVICE * MAX_IDE_LINE];
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| 191 | PULONG TransferModeTimingTable;
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| 192 | ULONG TransferModeTableLength;
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| 193 | } PCIIDE_TRANSFER_MODE_SELECT, *PPCIIDE_TRANSFER_MODE_SELECT;
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| 194 |
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| 195 | typedef enum
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| 196 | {
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| 197 | ChannelDisabled = 0,
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| 198 | ChannelEnabled,
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| 199 | ChannelStateUnknown
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| 200 | } IDE_CHANNEL_STATE;
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| 201 |
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| 202 | typedef IDE_CHANNEL_STATE
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| 203 | (NTAPI *PCIIDE_CHANNEL_ENABLED)(
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| 204 | IN PVOID DeviceExtension,
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| 205 | IN ULONG Channel);
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| 206 |
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| 207 | typedef BOOLEAN
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| 208 | (NTAPI *PCIIDE_SYNC_ACCESS_REQUIRED)(
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| 209 | IN PVOID DeviceExtension);
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| 210 |
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| 211 | typedef NTSTATUS
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| 212 | (NTAPI *PCIIDE_TRANSFER_MODE_SELECT_FUNC)(
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| 213 | IN PVOID DeviceExtension,
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| 214 | IN OUT PPCIIDE_TRANSFER_MODE_SELECT XferMode);
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| 215 |
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| 216 | typedef ULONG
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| 217 | (NTAPI *PCIIDE_USEDMA_FUNC)(
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| 218 | IN PVOID DeviceExtension,
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| 219 | IN PUCHAR CdbCommand,
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| 220 | IN PUCHAR Slave);
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| 221 |
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| 222 | typedef NTSTATUS
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| 223 | (NTAPI *PCIIDE_UDMA_MODES_SUPPORTED)(
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| 224 | IN IDENTIFY_DATA IdentifyData,
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| 225 | OUT PULONG BestXferMode,
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| 226 | OUT PULONG CurrentXferMode);
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| 227 |
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| 228 | typedef struct _IDE_CONTROLLER_PROPERTIES
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| 229 | {
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| 230 | ULONG Size;
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| 231 | ULONG ExtensionSize;
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| 232 | ULONG SupportedTransferMode[MAX_IDE_CHANNEL][MAX_IDE_DEVICE];
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| 233 | PCIIDE_CHANNEL_ENABLED PciIdeChannelEnabled;
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| 234 | PCIIDE_SYNC_ACCESS_REQUIRED PciIdeSyncAccessRequired;
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| 235 | PCIIDE_TRANSFER_MODE_SELECT_FUNC PciIdeTransferModeSelect;
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| 236 | BOOLEAN IgnoreActiveBitForAtaDevice;
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| 237 | BOOLEAN AlwaysClearBusMasterInterrupt;
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| 238 | PCIIDE_USEDMA_FUNC PciIdeUseDma;
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| 239 | ULONG AlignmentRequirement;
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| 240 | ULONG DefaultPIO;
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| 241 | PCIIDE_UDMA_MODES_SUPPORTED PciIdeUdmaModesSupported;
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| 242 | } IDE_CONTROLLER_PROPERTIES, *PIDE_CONTROLLER_PROPERTIES;
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| 243 |
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| 244 | typedef NTSTATUS
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| 245 | (NTAPI *PCONTROLLER_PROPERTIES)(
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| 246 | IN PVOID DeviceExtension,
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| 247 | IN PIDE_CONTROLLER_PROPERTIES ControllerProperties);
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| 248 |
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| 249 | NTSTATUS NTAPI
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| 250 | PciIdeXInitialize(
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| 251 | IN PDRIVER_OBJECT DriverObject,
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| 252 | IN PUNICODE_STRING RegistryPath,
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| 253 | IN PCONTROLLER_PROPERTIES HwGetControllerProperties,
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| 254 | IN ULONG ExtensionSize);
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| 255 |
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| 256 | NTSTATUS NTAPI
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| 257 | PciIdeXGetBusData(
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| 258 | IN PVOID DeviceExtension,
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| 259 | IN PVOID Buffer,
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| 260 | IN ULONG ConfigDataOffset,
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| 261 | IN ULONG BufferLength);
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| 262 |
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| 263 | NTSTATUS NTAPI
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| 264 | PciIdeXSetBusData(
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| 265 | IN PVOID DeviceExtension,
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| 266 | IN PVOID Buffer,
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| 267 | IN PVOID DataMask,
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| 268 | IN ULONG ConfigDataOffset,
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| 269 | IN ULONG BufferLength);
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| 270 |
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| 271 | /* Bit field values for
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| 272 | * PCIIDE_TRANSFER_MODE_SELECT.DeviceTransferModeSupported and
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| 273 | * IDE_CONTROLLER_PROPERTIES.SupportedTransferMode
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| 274 | */
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| 275 | // PIO Modes
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| 276 | #define PIO_MODE0 (1 << 0)
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| 277 | #define PIO_MODE1 (1 << 1)
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| 278 | #define PIO_MODE2 (1 << 2)
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| 279 | #define PIO_MODE3 (1 << 3)
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| 280 | #define PIO_MODE4 (1 << 4)
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| 281 | // Single-word DMA Modes
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| 282 | #define SWDMA_MODE0 (1 << 5)
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| 283 | #define SWDMA_MODE1 (1 << 6)
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| 284 | #define SWDMA_MODE2 (1 << 7)
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| 285 | // Multi-word DMA Modes
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| 286 | #define MWDMA_MODE0 (1 << 8)
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| 287 | #define MWDMA_MODE1 (1 << 9)
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| 288 | #define MWDMA_MODE2 (1 << 10)
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| 289 | // Ultra DMA Modes
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| 290 | #define UDMA_MODE0 (1 << 11)
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| 291 | #define UDMA_MODE1 (1 << 12)
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| 292 | #define UDMA_MODE2 (1 << 13)
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| 293 | #define UDMA_MODE3 (1 << 14)
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| 294 | #define UDMA_MODE4 (1 << 15)
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| 295 | #define UDMA_MODE5 (1 << 16)
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| 296 |
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| 297 | #ifdef __cplusplus
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| 298 | }
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| 299 | #endif
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| 300 |
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| 301 | #endif /* __IDE_H */
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