1 | /*
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2 | * miniport.h
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3 | *
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4 | * Type definitions for miniport drivers
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5 | *
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6 | * This file is part of the w32api package.
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7 | *
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8 | * Contributors:
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9 | * Created by Casper S. Hornstrup <chorns@users.sourceforge.net>
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10 | *
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11 | * THIS SOFTWARE IS NOT COPYRIGHTED
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12 | *
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13 | * This source code is offered for use in the public domain. You may
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14 | * use, modify or distribute it freely.
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15 | *
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16 | * This code is distributed in the hope that it will be useful but
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17 | * WITHOUT ANY WARRANTY. ALL WARRANTIES, EXPRESS OR IMPLIED ARE HEREBY
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18 | * DISCLAIMED. This includes but is not limited to warranties of
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19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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20 | *
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21 | */
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22 |
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23 | #ifndef _MINIPORT_
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24 | #define _MINIPORT_
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25 |
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26 | #ifdef __cplusplus
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27 | extern "C" {
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28 | #endif
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29 |
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30 | #define EMULATOR_READ_ACCESS 0x01
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31 | #define EMULATOR_WRITE_ACCESS 0x02
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32 |
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33 | typedef enum _EMULATOR_PORT_ACCESS_TYPE {
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34 | Uchar,
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35 | Ushort,
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36 | Ulong
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37 | } EMULATOR_PORT_ACCESS_TYPE, *PEMULATOR_PORT_ACCESS_TYPE;
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38 |
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39 |
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40 | typedef struct _EMULATOR_ACCESS_ENTRY {
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41 | ULONG BasePort;
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42 | ULONG NumConsecutivePorts;
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43 | EMULATOR_PORT_ACCESS_TYPE AccessType;
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44 | UCHAR AccessMode;
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45 | UCHAR StringSupport;
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46 | PVOID Routine;
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47 | } EMULATOR_ACCESS_ENTRY, *PEMULATOR_ACCESS_ENTRY;
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48 |
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49 | typedef VOID
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50 | (NTAPI *PBANKED_SECTION_ROUTINE)(
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51 | IN ULONG ReadBank,
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52 | IN ULONG WriteBank,
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53 | IN PVOID Context);
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54 |
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55 | #ifndef __BROKEN__
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56 |
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57 | typedef enum _INTERFACE_TYPE {
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58 | InterfaceTypeUndefined = -1,
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59 | Internal,
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60 | Isa,
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61 | Eisa,
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62 | MicroChannel,
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63 | TurboChannel,
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64 | PCIBus,
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65 | VMEBus,
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66 | NuBus,
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67 | PCMCIABus,
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68 | CBus,
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69 | MPIBus,
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70 | MPSABus,
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71 | ProcessorInternal,
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72 | InternalPowerBus,
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73 | PNPISABus,
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74 | PNPBus,
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75 | Vmcs,
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76 | MaximumInterfaceType
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77 | }INTERFACE_TYPE, *PINTERFACE_TYPE;
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78 |
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79 | typedef enum _KINTERRUPT_MODE {
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80 | LevelSensitive,
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81 | Latched
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82 | } KINTERRUPT_MODE;
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83 |
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84 | typedef VOID (*PINTERFACE_REFERENCE)(PVOID Context);
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85 | typedef VOID (*PINTERFACE_DEREFERENCE)(PVOID Context);
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86 |
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87 | typedef enum _BUS_DATA_TYPE {
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88 | ConfigurationSpaceUndefined = -1,
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89 | Cmos,
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90 | EisaConfiguration,
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91 | Pos,
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92 | CbusConfiguration,
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93 | PCIConfiguration,
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94 | VMEConfiguration,
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95 | NuBusConfiguration,
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96 | PCMCIAConfiguration,
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97 | MPIConfiguration,
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98 | MPSAConfiguration,
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99 | PNPISAConfiguration,
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100 | SgiInternalConfiguration,
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101 | MaximumBusDataType
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102 | } BUS_DATA_TYPE, *PBUS_DATA_TYPE;
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103 |
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104 | typedef enum _DMA_WIDTH {
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105 | Width8Bits,
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106 | Width16Bits,
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107 | Width32Bits,
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108 | MaximumDmaWidth
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109 | }DMA_WIDTH, *PDMA_WIDTH;
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110 |
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111 | typedef enum _DMA_SPEED {
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112 | Compatible,
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113 | TypeA,
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114 | TypeB,
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115 | TypeC,
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116 | TypeF,
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117 | MaximumDmaSpeed
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118 | }DMA_SPEED, *PDMA_SPEED;
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119 |
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120 | typedef struct _INTERFACE {
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121 | USHORT Size;
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122 | USHORT Version;
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123 | PVOID Context;
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124 | PINTERFACE_REFERENCE InterfaceReference;
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125 | PINTERFACE_DEREFERENCE InterfaceDereference;
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126 | } INTERFACE, *PINTERFACE;
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127 |
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128 | typedef enum _IRQ_DEVICE_POLICY {
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129 | IrqPolicyMachineDefault = 0,
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130 | IrqPolicyAllCloseProcessors,
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131 | IrqPolicyOneCloseProcessor,
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132 | IrqPolicyAllProcessorsInMachine,
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133 | IrqPolicySpecifiedProcessors,
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134 | IrqPolicySpreadMessagesAcrossAllProcessors
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135 | } IRQ_DEVICE_POLICY, *PIRQ_DEVICE_POLICY;
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136 |
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137 | typedef enum _IRQ_PRIORITY {
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138 | IrqPriorityUndefined = 0,
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139 | IrqPriorityLow,
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140 | IrqPriorityNormal,
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141 | IrqPriorityHigh
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142 | } IRQ_PRIORITY, *PIRQ_PRIORITY;
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143 |
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144 | typedef struct _IO_RESOURCE_DESCRIPTOR {
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145 | UCHAR Option;
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146 | UCHAR Type; // use CM_RESOURCE_TYPE
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147 | UCHAR ShareDisposition; // use CM_SHARE_DISPOSITION
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148 | UCHAR Spare1;
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149 | USHORT Flags; // use CM resource flag defines
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150 | USHORT Spare2; // align
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151 |
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152 | union {
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153 | struct {
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154 | ULONG Length;
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155 | ULONG Alignment;
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156 | PHYSICAL_ADDRESS MinimumAddress;
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157 | PHYSICAL_ADDRESS MaximumAddress;
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158 | } Port;
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159 |
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160 | struct {
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161 | ULONG Length;
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162 | ULONG Alignment;
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163 | PHYSICAL_ADDRESS MinimumAddress;
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164 | PHYSICAL_ADDRESS MaximumAddress;
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165 | } Memory;
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166 |
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167 | struct {
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168 | ULONG MinimumVector;
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169 | ULONG MaximumVector;
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170 | IRQ_DEVICE_POLICY AffinityPolicy;
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171 | IRQ_PRIORITY PriorityPolicy;
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172 | KAFFINITY TargetedProcessors;
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173 | } Interrupt;
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174 |
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175 | struct {
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176 | ULONG MinimumChannel;
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177 | ULONG MaximumChannel;
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178 | } Dma;
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179 |
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180 | struct {
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181 | ULONG Length;
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182 | ULONG Alignment;
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183 | PHYSICAL_ADDRESS MinimumAddress;
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184 | PHYSICAL_ADDRESS MaximumAddress;
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185 | } Generic;
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186 |
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187 | struct {
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188 | ULONG Data[3];
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189 | } DevicePrivate;
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190 |
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191 | //
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192 | // Bus Number information.
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193 | //
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194 |
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195 | struct {
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196 | ULONG Length;
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197 | ULONG MinBusNumber;
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198 | ULONG MaxBusNumber;
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199 | ULONG Reserved;
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200 | } BusNumber;
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201 |
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202 | struct {
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203 | ULONG Priority; // use LCPRI_Xxx values in cfg.h
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204 | ULONG Reserved1;
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205 | ULONG Reserved2;
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206 | } ConfigData;
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207 |
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208 | //
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209 | // The following structures provide descriptions
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210 | // for memory resource requirement greater than MAXULONG
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211 | //
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212 |
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213 | struct {
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214 | ULONG Length40;
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215 | ULONG Alignment40;
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216 | PHYSICAL_ADDRESS MinimumAddress;
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217 | PHYSICAL_ADDRESS MaximumAddress;
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218 | } Memory40;
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219 |
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220 | struct {
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221 | ULONG Length48;
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222 | ULONG Alignment48;
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223 | PHYSICAL_ADDRESS MinimumAddress;
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224 | PHYSICAL_ADDRESS MaximumAddress;
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225 | } Memory48;
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226 |
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227 | struct {
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228 | ULONG Length64;
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229 | ULONG Alignment64;
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230 | PHYSICAL_ADDRESS MinimumAddress;
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231 | PHYSICAL_ADDRESS MaximumAddress;
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232 | } Memory64;
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233 |
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234 | } u;
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235 |
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236 | } IO_RESOURCE_DESCRIPTOR, *PIO_RESOURCE_DESCRIPTOR;
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237 |
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238 | #include <guiddef.h>
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239 | #endif /* ! __BROKEN__ */
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240 |
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241 | #ifdef __cplusplus
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242 | }
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243 | #endif
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244 |
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245 | #endif /* __MINIPORT_H */
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