| [1166] | 1 | /*
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| 2 | * parallel.h
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| 3 | *
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| 4 | * ParPort driver interface
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| 5 | *
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| 6 | * This file is part of the w32api package.
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| 7 | *
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| 8 | * Contributors:
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| 9 | * Created by Casper S. Hornstrup <chorns@users.sourceforge.net>
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| 10 | *
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| 11 | * THIS SOFTWARE IS NOT COPYRIGHTED
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| 12 | *
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| 13 | * This source code is offered for use in the public domain. You may
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| 14 | * use, modify or distribute it freely.
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| 15 | *
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| 16 | * This code is distributed in the hope that it will be useful but
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| 17 | * WITHOUT ANY WARRANTY. ALL WARRANTIES, EXPRESS OR IMPLIED ARE HEREBY
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| 18 | * DISCLAIMED. This includes but is not limited to warranties of
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| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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| 20 | *
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| 21 | */
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| 22 |
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| 23 | #ifndef __PARALLEL_H
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| 24 | #define __PARALLEL_H
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| 25 |
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| 26 | #include "ntddpar.h"
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| 27 |
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| 28 | #ifdef __cplusplus
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| 29 | extern "C" {
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| 30 | #endif
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| 31 |
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| 32 | #define DD_PARALLEL_PORT_BASE_NAME "ParallelPort"
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| 33 | #define DD_PARALLEL_PORT_BASE_NAME_U L"ParallelPort"
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| 34 |
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| 35 | #define IOCTL_INTERNAL_DESELECT_DEVICE \
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| 36 | CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 24, METHOD_BUFFERED, FILE_ANY_ACCESS)
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| 37 | #define IOCTL_INTERNAL_GET_MORE_PARALLEL_PORT_INFO \
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| 38 | CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 17, METHOD_BUFFERED, FILE_ANY_ACCESS)
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| 39 | #define IOCTL_INTERNAL_GET_PARALLEL_PNP_INFO \
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| 40 | CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 21, METHOD_BUFFERED, FILE_ANY_ACCESS)
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| 41 | #define IOCTL_INTERNAL_GET_PARALLEL_PORT_INFO \
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| 42 | CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 12, METHOD_BUFFERED, FILE_ANY_ACCESS)
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| 43 | #define IOCTL_INTERNAL_INIT_1284_3_BUS \
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| 44 | CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 22, METHOD_BUFFERED, FILE_ANY_ACCESS)
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| 45 | #define IOCTL_INTERNAL_PARALLEL_CLEAR_CHIP_MODE \
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| 46 | CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 20, METHOD_BUFFERED, FILE_ANY_ACCESS)
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| 47 | #define IOCTL_INTERNAL_PARALLEL_CONNECT_INTERRUPT \
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| 48 | CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 13, METHOD_BUFFERED, FILE_ANY_ACCESS)
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| 49 | #define IOCTL_INTERNAL_PARALLEL_DISCONNECT_INTERRUPT \
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| 50 | CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 14, METHOD_BUFFERED, FILE_ANY_ACCESS)
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| 51 | #define IOCTL_INTERNAL_PARALLEL_PORT_ALLOCATE \
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| 52 | CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 11, METHOD_BUFFERED, FILE_ANY_ACCESS)
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| 53 | #define IOCTL_INTERNAL_PARALLEL_PORT_FREE \
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| 54 | CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 40, METHOD_BUFFERED, FILE_ANY_ACCESS)
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| 55 | #define IOCTL_INTERNAL_PARALLEL_SET_CHIP_MODE \
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| 56 | CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 19, METHOD_BUFFERED, FILE_ANY_ACCESS)
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| 57 | #define IOCTL_INTERNAL_RELEASE_PARALLEL_PORT_INFO \
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| 58 | CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 15, METHOD_BUFFERED, FILE_ANY_ACCESS)
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| 59 | #define IOCTL_INTERNAL_SELECT_DEVICE \
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| 60 | CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 23, METHOD_BUFFERED, FILE_ANY_ACCESS)
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| 61 |
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| 62 |
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| 63 | typedef struct _PARALLEL_1284_COMMAND {
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| 64 | UCHAR ID;
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| 65 | UCHAR Port;
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| 66 | ULONG CommandFlags;
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| 67 | } PARALLEL_1284_COMMAND, *PPARALLEL_1284_COMMAND;
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| 68 |
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| 69 | /* PARALLEL_1284_COMMAND.CommandFlags */
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| 70 | #define PAR_END_OF_CHAIN_DEVICE 0x00000001
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| 71 | #define PAR_HAVE_PORT_KEEP_PORT 0x00000002
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| 72 |
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| 73 | typedef struct _MORE_PARALLEL_PORT_INFORMATION {
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| 74 | INTERFACE_TYPE InterfaceType;
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| 75 | ULONG BusNumber;
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| 76 | ULONG InterruptLevel;
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| 77 | ULONG InterruptVector;
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| 78 | KAFFINITY InterruptAffinity;
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| 79 | KINTERRUPT_MODE InterruptMode;
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| 80 | } MORE_PARALLEL_PORT_INFORMATION, *PMORE_PARALLEL_PORT_INFORMATION;
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| 81 |
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| 82 | typedef NTSTATUS
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| 83 | (NTAPI *PPARALLEL_SET_CHIP_MODE)(
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| 84 | IN PVOID SetChipContext,
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| 85 | IN UCHAR ChipMode);
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| 86 |
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| 87 | typedef NTSTATUS
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| 88 | (NTAPI *PPARALLEL_CLEAR_CHIP_MODE)(
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| 89 | IN PVOID ClearChipContext,
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| 90 | IN UCHAR ChipMode);
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| 91 |
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| 92 | typedef NTSTATUS
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| 93 | (NTAPI *PPARCHIP_CLEAR_CHIP_MODE)(
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| 94 | IN PVOID ClearChipContext,
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| 95 | IN UCHAR ChipMode);
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| 96 |
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| 97 | typedef NTSTATUS
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| 98 | (NTAPI *PPARALLEL_TRY_SELECT_ROUTINE)(
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| 99 | IN PVOID TrySelectContext,
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| 100 | IN PVOID TrySelectCommand);
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| 101 |
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| 102 | typedef NTSTATUS
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| 103 | (NTAPI *PPARALLEL_DESELECT_ROUTINE)(
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| 104 | IN PVOID DeselectContext,
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| 105 | IN PVOID DeselectCommand);
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| 106 |
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| 107 | /* PARALLEL_PNP_INFORMATION.HardwareCapabilities */
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| 108 | #define PPT_NO_HARDWARE_PRESENT 0x00000000
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| 109 | #define PPT_ECP_PRESENT 0x00000001
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| 110 | #define PPT_EPP_PRESENT 0x00000002
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| 111 | #define PPT_EPP_32_PRESENT 0x00000004
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| 112 | #define PPT_BYTE_PRESENT 0x00000008
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| 113 | #define PPT_BIDI_PRESENT 0x00000008
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| 114 | #define PPT_1284_3_PRESENT 0x00000010
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| 115 |
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| 116 | typedef struct _PARALLEL_PNP_INFORMATION {
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| 117 | PHYSICAL_ADDRESS OriginalEcpController;
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| 118 | PUCHAR EcpController;
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| 119 | ULONG SpanOfEcpController;
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| 120 | ULONG PortNumber;
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| 121 | ULONG HardwareCapabilities;
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| 122 | PPARALLEL_SET_CHIP_MODE TrySetChipMode;
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| 123 | PPARALLEL_CLEAR_CHIP_MODE ClearChipMode;
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| 124 | ULONG FifoDepth;
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| 125 | ULONG FifoWidth;
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| 126 | PHYSICAL_ADDRESS EppControllerPhysicalAddress;
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| 127 | ULONG SpanOfEppController;
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| 128 | ULONG Ieee1284_3DeviceCount;
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| 129 | PPARALLEL_TRY_SELECT_ROUTINE TrySelectDevice;
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| 130 | PPARALLEL_DESELECT_ROUTINE DeselectDevice;
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| 131 | PVOID Context;
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| 132 | ULONG CurrentMode;
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| 133 | PWSTR PortName;
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| 134 | } PARALLEL_PNP_INFORMATION, *PPARALLEL_PNP_INFORMATION;
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| 135 |
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| 136 | typedef BOOLEAN
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| 137 | (NTAPI *PPARALLEL_TRY_ALLOCATE_ROUTINE)(
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| 138 | IN PVOID TryAllocateContext);
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| 139 |
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| 140 | typedef VOID
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| 141 | (NTAPI *PPARALLEL_FREE_ROUTINE)(
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| 142 | IN PVOID FreeContext);
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| 143 |
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| 144 | typedef ULONG
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| 145 | (NTAPI *PPARALLEL_QUERY_WAITERS_ROUTINE)(
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| 146 | IN PVOID QueryAllocsContext);
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| 147 |
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| 148 | typedef struct _PARALLEL_PORT_INFORMATION {
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| 149 | PHYSICAL_ADDRESS OriginalController;
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| 150 | PUCHAR Controller;
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| 151 | ULONG SpanOfController;
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| 152 | PPARALLEL_TRY_ALLOCATE_ROUTINE TryAllocatePort;
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| 153 | PPARALLEL_FREE_ROUTINE FreePort;
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| 154 | PPARALLEL_QUERY_WAITERS_ROUTINE QueryNumWaiters;
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| 155 | PVOID Context;
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| 156 | } PARALLEL_PORT_INFORMATION, *PPARALLEL_PORT_INFORMATION;
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| 157 |
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| 158 | /* PARALLEL_CHIP_MODE.ModeFlags */
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| 159 | #define INITIAL_MODE 0x00
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| 160 | #define PARCHIP_ECR_ARBITRATOR 0x01
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| 161 |
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| 162 | typedef struct _PARALLEL_CHIP_MODE {
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| 163 | UCHAR ModeFlags;
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| 164 | BOOLEAN success;
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| 165 | } PARALLEL_CHIP_MODE, *PPARALLEL_CHIP_MODE;
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| 166 |
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| 167 | typedef VOID
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| 168 | (NTAPI *PPARALLEL_DEFERRED_ROUTINE)(
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| 169 | IN PVOID DeferredContext);
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| 170 |
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| 171 | typedef struct _PARALLEL_INTERRUPT_SERVICE_ROUTINE {
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| 172 | PKSERVICE_ROUTINE InterruptServiceRoutine;
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| 173 | PVOID InterruptServiceContext;
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| 174 | PPARALLEL_DEFERRED_ROUTINE DeferredPortCheckRoutine;
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| 175 | PVOID DeferredPortCheckContext;
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| 176 | } PARALLEL_INTERRUPT_SERVICE_ROUTINE, *PPARALLEL_INTERRUPT_SERVICE_ROUTINE;
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| 177 |
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| 178 |
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| 179 | #define IOCTL_INTERNAL_DISCONNECT_IDLE \
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| 180 | CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 32, METHOD_BUFFERED, FILE_ANY_ACCESS)
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| 181 | #define IOCTL_INTERNAL_LOCK_PORT \
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| 182 | CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 37, METHOD_BUFFERED, FILE_ANY_ACCESS)
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| 183 | #define IOCTL_INTERNAL_LOCK_PORT_NO_SELECT \
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| 184 | CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 52, METHOD_BUFFERED, FILE_ANY_ACCESS)
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| 185 | #define IOCTL_INTERNAL_PARCLASS_CONNECT \
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| 186 | CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 30, METHOD_BUFFERED, FILE_ANY_ACCESS)
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| 187 | #define IOCTL_INTERNAL_PARCLASS_DISCONNECT \
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| 188 | CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 31, METHOD_BUFFERED, FILE_ANY_ACCESS)
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| 189 | #define IOCTL_INTERNAL_UNLOCK_PORT \
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| 190 | CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 38, METHOD_BUFFERED, FILE_ANY_ACCESS)
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| 191 | #define IOCTL_INTERNAL_UNLOCK_PORT_NO_DESELECT \
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| 192 | CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 53, METHOD_BUFFERED, FILE_ANY_ACCESS)
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| 193 |
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| 194 | typedef USHORT
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| 195 | (NTAPI *PDETERMINE_IEEE_MODES)(
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| 196 | IN PVOID Context);
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| 197 |
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| 198 | typedef enum _PARALLEL_SAFETY {
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| 199 | SAFE_MODE,
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| 200 | UNSAFE_MODE
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| 201 | } PARALLEL_SAFETY;
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| 202 |
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| 203 | typedef NTSTATUS
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| 204 | (NTAPI *PNEGOTIATE_IEEE_MODE)(
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| 205 | IN PVOID Context,
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| 206 | IN USHORT ModeMaskFwd,
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| 207 | IN USHORT ModeMaskRev,
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| 208 | IN PARALLEL_SAFETY ModeSafety,
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| 209 | IN BOOLEAN IsForward);
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| 210 |
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| 211 | typedef NTSTATUS
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| 212 | (NTAPI *PTERMINATE_IEEE_MODE)(
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| 213 | IN PVOID Context);
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| 214 |
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| 215 | typedef NTSTATUS
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| 216 | (NTAPI *PPARALLEL_IEEE_FWD_TO_REV)(
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| 217 | IN PVOID Context);
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| 218 |
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| 219 | typedef NTSTATUS
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| 220 | (NTAPI *PPARALLEL_IEEE_REV_TO_FWD)(
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| 221 | IN PVOID Context);
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| 222 |
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| 223 | typedef NTSTATUS
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| 224 | (NTAPI *PPARALLEL_READ)(
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| 225 | IN PVOID Context,
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| 226 | OUT PVOID Buffer,
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| 227 | IN ULONG NumBytesToRead,
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| 228 | OUT PULONG NumBytesRead,
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| 229 | IN UCHAR Channel);
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| 230 |
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| 231 | typedef NTSTATUS
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| 232 | (NTAPI *PPARALLEL_WRITE)(
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| 233 | IN PVOID Context,
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| 234 | OUT PVOID Buffer,
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| 235 | IN ULONG NumBytesToWrite,
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| 236 | OUT PULONG NumBytesWritten,
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| 237 | IN UCHAR Channel);
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| 238 |
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| 239 | typedef NTSTATUS
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| 240 | (NTAPI *PPARALLEL_TRYSELECT_DEVICE)(
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| 241 | IN PVOID Context,
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| 242 | IN PARALLEL_1284_COMMAND Command);
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| 243 |
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| 244 | typedef NTSTATUS
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| 245 | (NTAPI *PPARALLEL_DESELECT_DEVICE)(
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| 246 | IN PVOID Context,
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| 247 | IN PARALLEL_1284_COMMAND Command);
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| 248 |
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| 249 | typedef struct _PARCLASS_INFORMATION {
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| 250 | PUCHAR Controller;
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| 251 | PUCHAR EcrController;
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| 252 | ULONG SpanOfController;
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| 253 | PDETERMINE_IEEE_MODES DetermineIeeeModes;
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| 254 | PNEGOTIATE_IEEE_MODE NegotiateIeeeMode;
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| 255 | PTERMINATE_IEEE_MODE TerminateIeeeMode;
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| 256 | PPARALLEL_IEEE_FWD_TO_REV IeeeFwdToRevMode;
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| 257 | PPARALLEL_IEEE_REV_TO_FWD IeeeRevToFwdMode;
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| 258 | PPARALLEL_READ ParallelRead;
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| 259 | PPARALLEL_WRITE ParallelWrite;
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| 260 | PVOID ParclassContext;
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| 261 | ULONG HardwareCapabilities;
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| 262 | ULONG FifoDepth;
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| 263 | ULONG FifoWidth;
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| 264 | PPARALLEL_TRYSELECT_DEVICE ParallelTryselect;
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| 265 | PPARALLEL_DESELECT_DEVICE ParallelDeSelect;
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| 266 | } PARCLASS_INFORMATION, *PPARCLASS_INFORMATION;
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| 267 |
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| 268 | #ifdef __cplusplus
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| 269 | }
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| 270 | #endif
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| 271 |
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| 272 | #endif /* __PARALLEL_H */
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