| 1 | /* Copyright (C) 2015-2021 Free Software Foundation, Inc.
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| 2 |
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| 3 | This file is part of GCC.
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| 4 |
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| 5 | GCC is free software; you can redistribute it and/or modify
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| 6 | it under the terms of the GNU General Public License as published by
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| 7 | the Free Software Foundation; either version 3, or (at your option)
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| 8 | any later version.
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| 9 |
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| 10 | GCC is distributed in the hope that it will be useful,
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| 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of
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| 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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| 13 | GNU General Public License for more details.
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| 14 |
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| 15 | Under Section 7 of GPL version 3, you are granted additional
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| 16 | permissions described in the GCC Runtime Library Exception, version
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| 17 | 3.1, as published by the Free Software Foundation.
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| 18 |
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| 19 | You should have received a copy of the GNU General Public License and
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| 20 | a copy of the GCC Runtime Library Exception along with this program;
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| 21 | see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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| 22 | <http://www.gnu.org/licenses/>. */
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| 23 |
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| 24 | #if !defined _IMMINTRIN_H_INCLUDED
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| 25 | # error "Never use <avx5124fmapsintrin.h> directly; include <x86intrin.h> instead."
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| 26 | #endif
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| 27 |
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| 28 | #ifndef _AVX5124FMAPSINTRIN_H_INCLUDED
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| 29 | #define _AVX5124FMAPSINTRIN_H_INCLUDED
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| 30 |
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| 31 | #ifndef __AVX5124FMAPS__
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| 32 | #pragma GCC push_options
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| 33 | #pragma GCC target("avx5124fmaps")
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| 34 | #define __DISABLE_AVX5124FMAPS__
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| 35 | #endif /* __AVX5124FMAPS__ */
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| 36 |
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| 37 | extern __inline __m512
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| 38 | __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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| 39 | _mm512_4fmadd_ps (__m512 __A, __m512 __B, __m512 __C,
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| 40 | __m512 __D, __m512 __E, __m128 *__F)
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| 41 | {
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| 42 | return (__m512) __builtin_ia32_4fmaddps ((__v16sf) __B,
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| 43 | (__v16sf) __C,
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| 44 | (__v16sf) __D,
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| 45 | (__v16sf) __E,
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| 46 | (__v16sf) __A,
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| 47 | (const __v4sf *) __F);
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| 48 | }
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| 49 |
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| 50 | extern __inline __m512
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| 51 | __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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| 52 | _mm512_mask_4fmadd_ps (__m512 __A, __mmask16 __U, __m512 __B,
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| 53 | __m512 __C, __m512 __D, __m512 __E, __m128 *__F)
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| 54 | {
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| 55 | return (__m512) __builtin_ia32_4fmaddps_mask ((__v16sf) __B,
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| 56 | (__v16sf) __C,
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| 57 | (__v16sf) __D,
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| 58 | (__v16sf) __E,
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| 59 | (__v16sf) __A,
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| 60 | (const __v4sf *) __F,
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| 61 | (__v16sf) __A,
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| 62 | (__mmask16) __U);
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| 63 | }
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| 64 |
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| 65 | extern __inline __m512
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| 66 | __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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| 67 | _mm512_maskz_4fmadd_ps (__mmask16 __U,
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| 68 | __m512 __A, __m512 __B, __m512 __C,
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| 69 | __m512 __D, __m512 __E, __m128 *__F)
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| 70 | {
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| 71 | return (__m512) __builtin_ia32_4fmaddps_mask ((__v16sf) __B,
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| 72 | (__v16sf) __C,
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| 73 | (__v16sf) __D,
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| 74 | (__v16sf) __E,
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| 75 | (__v16sf) __A,
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| 76 | (const __v4sf *) __F,
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| 77 | (__v16sf) _mm512_setzero_ps (),
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| 78 | (__mmask16) __U);
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| 79 | }
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| 80 |
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| 81 | extern __inline __m128
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| 82 | __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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| 83 | _mm_4fmadd_ss (__m128 __A, __m128 __B, __m128 __C,
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| 84 | __m128 __D, __m128 __E, __m128 *__F)
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| 85 | {
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| 86 | return (__m128) __builtin_ia32_4fmaddss ((__v4sf) __B,
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| 87 | (__v4sf) __C,
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| 88 | (__v4sf) __D,
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| 89 | (__v4sf) __E,
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| 90 | (__v4sf) __A,
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| 91 | (const __v4sf *) __F);
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| 92 | }
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| 93 |
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| 94 | extern __inline __m128
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| 95 | __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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| 96 | _mm_mask_4fmadd_ss (__m128 __A, __mmask8 __U, __m128 __B, __m128 __C,
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| 97 | __m128 __D, __m128 __E, __m128 *__F)
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| 98 | {
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| 99 | return (__m128) __builtin_ia32_4fmaddss_mask ((__v4sf) __B,
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| 100 | (__v4sf) __C,
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| 101 | (__v4sf) __D,
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| 102 | (__v4sf) __E,
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| 103 | (__v4sf) __A,
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| 104 | (const __v4sf *) __F,
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| 105 | (__v4sf) __A,
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| 106 | (__mmask8) __U);
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| 107 | }
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| 108 |
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| 109 | extern __inline __m128
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| 110 | __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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| 111 | _mm_maskz_4fmadd_ss (__mmask8 __U, __m128 __A, __m128 __B, __m128 __C,
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| 112 | __m128 __D, __m128 __E, __m128 *__F)
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| 113 | {
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| 114 | return (__m128) __builtin_ia32_4fmaddss_mask ((__v4sf) __B,
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| 115 | (__v4sf) __C,
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| 116 | (__v4sf) __D,
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| 117 | (__v4sf) __E,
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| 118 | (__v4sf) __A,
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| 119 | (const __v4sf *) __F,
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| 120 | (__v4sf) _mm_setzero_ps (),
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| 121 | (__mmask8) __U);
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| 122 | }
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| 123 |
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| 124 | extern __inline __m512
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| 125 | __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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| 126 | _mm512_4fnmadd_ps (__m512 __A, __m512 __B, __m512 __C,
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| 127 | __m512 __D, __m512 __E, __m128 *__F)
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| 128 | {
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| 129 | return (__m512) __builtin_ia32_4fnmaddps ((__v16sf) __B,
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| 130 | (__v16sf) __C,
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| 131 | (__v16sf) __D,
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| 132 | (__v16sf) __E,
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| 133 | (__v16sf) __A,
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| 134 | (const __v4sf *) __F);
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| 135 | }
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| 136 |
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| 137 | extern __inline __m512
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| 138 | __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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| 139 | _mm512_mask_4fnmadd_ps (__m512 __A, __mmask16 __U, __m512 __B,
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| 140 | __m512 __C, __m512 __D, __m512 __E, __m128 *__F)
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| 141 | {
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| 142 | return (__m512) __builtin_ia32_4fnmaddps_mask ((__v16sf) __B,
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| 143 | (__v16sf) __C,
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| 144 | (__v16sf) __D,
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| 145 | (__v16sf) __E,
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| 146 | (__v16sf) __A,
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| 147 | (const __v4sf *) __F,
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| 148 | (__v16sf) __A,
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| 149 | (__mmask16) __U);
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| 150 | }
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| 151 |
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| 152 | extern __inline __m512
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| 153 | __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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| 154 | _mm512_maskz_4fnmadd_ps (__mmask16 __U,
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| 155 | __m512 __A, __m512 __B, __m512 __C,
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| 156 | __m512 __D, __m512 __E, __m128 *__F)
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| 157 | {
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| 158 | return (__m512) __builtin_ia32_4fnmaddps_mask ((__v16sf) __B,
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| 159 | (__v16sf) __C,
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| 160 | (__v16sf) __D,
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| 161 | (__v16sf) __E,
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| 162 | (__v16sf) __A,
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| 163 | (const __v4sf *) __F,
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| 164 | (__v16sf) _mm512_setzero_ps (),
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| 165 | (__mmask16) __U);
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| 166 | }
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| 167 |
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| 168 | extern __inline __m128
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| 169 | __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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| 170 | _mm_4fnmadd_ss (__m128 __A, __m128 __B, __m128 __C,
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| 171 | __m128 __D, __m128 __E, __m128 *__F)
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| 172 | {
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| 173 | return (__m128) __builtin_ia32_4fnmaddss ((__v4sf) __B,
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| 174 | (__v4sf) __C,
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| 175 | (__v4sf) __D,
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| 176 | (__v4sf) __E,
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| 177 | (__v4sf) __A,
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| 178 | (const __v4sf *) __F);
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| 179 | }
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| 180 |
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| 181 | extern __inline __m128
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| 182 | __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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| 183 | _mm_mask_4fnmadd_ss (__m128 __A, __mmask8 __U, __m128 __B, __m128 __C,
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| 184 | __m128 __D, __m128 __E, __m128 *__F)
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| 185 | {
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| 186 | return (__m128) __builtin_ia32_4fnmaddss_mask ((__v4sf) __B,
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| 187 | (__v4sf) __C,
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| 188 | (__v4sf) __D,
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| 189 | (__v4sf) __E,
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| 190 | (__v4sf) __A,
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| 191 | (const __v4sf *) __F,
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| 192 | (__v4sf) __A,
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| 193 | (__mmask8) __U);
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| 194 | }
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| 195 |
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| 196 | extern __inline __m128
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| 197 | __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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| 198 | _mm_maskz_4fnmadd_ss (__mmask8 __U, __m128 __A, __m128 __B, __m128 __C,
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| 199 | __m128 __D, __m128 __E, __m128 *__F)
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| 200 | {
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| 201 | return (__m128) __builtin_ia32_4fnmaddss_mask ((__v4sf) __B,
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| 202 | (__v4sf) __C,
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| 203 | (__v4sf) __D,
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| 204 | (__v4sf) __E,
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| 205 | (__v4sf) __A,
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| 206 | (const __v4sf *) __F,
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| 207 | (__v4sf) _mm_setzero_ps (),
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| 208 | (__mmask8) __U);
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| 209 | }
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| 210 |
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| 211 | #ifdef __DISABLE_AVX5124FMAPS__
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| 212 | #undef __DISABLE_AVX5124FMAPS__
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| 213 | #pragma GCC pop_options
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| 214 | #endif /* __DISABLE_AVX5124FMAPS__ */
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| 215 |
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| 216 | #endif /* _AVX5124FMAPSINTRIN_H_INCLUDED */
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