| [1166] | 1 | /* Copyright (C) 2015-2021 Free Software Foundation, Inc.
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| 2 |
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| 3 | This file is part of GCC.
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| 4 |
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| 5 | GCC is free software; you can redistribute it and/or modify
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| 6 | it under the terms of the GNU General Public License as published by
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| 7 | the Free Software Foundation; either version 3, or (at your option)
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| 8 | any later version.
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| 9 |
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| 10 | GCC is distributed in the hope that it will be useful,
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| 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of
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| 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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| 13 | GNU General Public License for more details.
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| 14 |
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| 15 | Under Section 7 of GPL version 3, you are granted additional
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| 16 | permissions described in the GCC Runtime Library Exception, version
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| 17 | 3.1, as published by the Free Software Foundation.
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| 18 |
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| 19 | You should have received a copy of the GNU General Public License and
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| 20 | a copy of the GCC Runtime Library Exception along with this program;
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| 21 | see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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| 22 | <http://www.gnu.org/licenses/>. */
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| 23 |
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| 24 | #if !defined _IMMINTRIN_H_INCLUDED
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| 25 | # error "Never use <avx5124vnniwintrin.h> directly; include <x86intrin.h> instead."
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| 26 | #endif
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| 27 |
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| 28 | #ifndef _AVX5124VNNIWINTRIN_H_INCLUDED
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| 29 | #define _AVX5124VNNIWINTRIN_H_INCLUDED
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| 30 |
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| 31 | #ifndef __AVX5124VNNIW__
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| 32 | #pragma GCC push_options
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| 33 | #pragma GCC target("avx5124vnniw")
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| 34 | #define __DISABLE_AVX5124VNNIW__
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| 35 | #endif /* __AVX5124VNNIW__ */
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| 36 |
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| 37 | extern __inline __m512i
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| 38 | __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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| 39 | _mm512_4dpwssd_epi32 (__m512i __A, __m512i __B, __m512i __C,
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| 40 | __m512i __D, __m512i __E, __m128i *__F)
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| 41 | {
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| 42 | return (__m512i) __builtin_ia32_vp4dpwssd ((__v16si) __B,
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| 43 | (__v16si) __C,
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| 44 | (__v16si) __D,
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| 45 | (__v16si) __E,
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| 46 | (__v16si) __A,
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| 47 | (const __v4si *) __F);
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| 48 | }
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| 49 |
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| 50 | extern __inline __m512i
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| 51 | __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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| 52 | _mm512_mask_4dpwssd_epi32 (__m512i __A, __mmask16 __U, __m512i __B,
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| 53 | __m512i __C, __m512i __D, __m512i __E,
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| 54 | __m128i *__F)
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| 55 | {
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| 56 | return (__m512i) __builtin_ia32_vp4dpwssd_mask ((__v16si) __B,
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| 57 | (__v16si) __C,
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| 58 | (__v16si) __D,
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| 59 | (__v16si) __E,
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| 60 | (__v16si) __A,
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| 61 | (const __v4si *) __F,
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| 62 | (__v16si) __A,
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| 63 | (__mmask16) __U);
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| 64 | }
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| 65 |
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| 66 | extern __inline __m512i
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| 67 | __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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| 68 | _mm512_maskz_4dpwssd_epi32 (__mmask16 __U, __m512i __A, __m512i __B,
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| 69 | __m512i __C, __m512i __D, __m512i __E,
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| 70 | __m128i *__F)
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| 71 | {
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| 72 | return (__m512i) __builtin_ia32_vp4dpwssd_mask ((__v16si) __B,
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| 73 | (__v16si) __C,
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| 74 | (__v16si) __D,
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| 75 | (__v16si) __E,
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| 76 | (__v16si) __A,
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| 77 | (const __v4si *) __F,
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| 78 | (__v16si) _mm512_setzero_ps (),
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| 79 | (__mmask16) __U);
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| 80 | }
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| 81 |
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| 82 | extern __inline __m512i
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| 83 | __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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| 84 | _mm512_4dpwssds_epi32 (__m512i __A, __m512i __B, __m512i __C,
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| 85 | __m512i __D, __m512i __E, __m128i *__F)
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| 86 | {
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| 87 | return (__m512i) __builtin_ia32_vp4dpwssds ((__v16si) __B,
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| 88 | (__v16si) __C,
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| 89 | (__v16si) __D,
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| 90 | (__v16si) __E,
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| 91 | (__v16si) __A,
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| 92 | (const __v4si *) __F);
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| 93 | }
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| 94 |
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| 95 | extern __inline __m512i
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| 96 | __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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| 97 | _mm512_mask_4dpwssds_epi32 (__m512i __A, __mmask16 __U, __m512i __B,
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| 98 | __m512i __C, __m512i __D, __m512i __E,
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| 99 | __m128i *__F)
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| 100 | {
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| 101 | return (__m512i) __builtin_ia32_vp4dpwssds_mask ((__v16si) __B,
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| 102 | (__v16si) __C,
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| 103 | (__v16si) __D,
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| 104 | (__v16si) __E,
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| 105 | (__v16si) __A,
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| 106 | (const __v4si *) __F,
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| 107 | (__v16si) __A,
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| 108 | (__mmask16) __U);
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| 109 | }
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| 110 |
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| 111 | extern __inline __m512i
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| 112 | __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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| 113 | _mm512_maskz_4dpwssds_epi32 (__mmask16 __U, __m512i __A, __m512i __B,
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| 114 | __m512i __C, __m512i __D, __m512i __E,
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| 115 | __m128i *__F)
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| 116 | {
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| 117 | return (__m512i) __builtin_ia32_vp4dpwssds_mask ((__v16si) __B,
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| 118 | (__v16si) __C,
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| 119 | (__v16si) __D,
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| 120 | (__v16si) __E,
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| 121 | (__v16si) __A,
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| 122 | (const __v4si *) __F,
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| 123 | (__v16si) _mm512_setzero_ps (),
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| 124 | (__mmask16) __U);
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| 125 | }
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| 126 |
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| 127 | #ifdef __DISABLE_AVX5124VNNIW__
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| 128 | #undef __DISABLE_AVX5124VNNIW__
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| 129 | #pragma GCC pop_options
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| 130 | #endif /* __DISABLE_AVX5124VNNIW__ */
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| 131 |
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| 132 | #endif /* _AVX5124VNNIWINTRIN_H_INCLUDED */
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