source: Daodan/MSYS2/mingw32/lib/gcc/i686-w64-mingw32/11.2.0/include/avx5124vnniwintrin.h@ 1171

Last change on this file since 1171 was 1166, checked in by rossy, 3 years ago

Daodan: Replace MinGW build env with an up-to-date MSYS2 env

File size: 4.2 KB
Line 
1/* Copyright (C) 2015-2021 Free Software Foundation, Inc.
2
3 This file is part of GCC.
4
5 GCC is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 3, or (at your option)
8 any later version.
9
10 GCC is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 Under Section 7 of GPL version 3, you are granted additional
16 permissions described in the GCC Runtime Library Exception, version
17 3.1, as published by the Free Software Foundation.
18
19 You should have received a copy of the GNU General Public License and
20 a copy of the GCC Runtime Library Exception along with this program;
21 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
22 <http://www.gnu.org/licenses/>. */
23
24#if !defined _IMMINTRIN_H_INCLUDED
25# error "Never use <avx5124vnniwintrin.h> directly; include <x86intrin.h> instead."
26#endif
27
28#ifndef _AVX5124VNNIWINTRIN_H_INCLUDED
29#define _AVX5124VNNIWINTRIN_H_INCLUDED
30
31#ifndef __AVX5124VNNIW__
32#pragma GCC push_options
33#pragma GCC target("avx5124vnniw")
34#define __DISABLE_AVX5124VNNIW__
35#endif /* __AVX5124VNNIW__ */
36
37extern __inline __m512i
38__attribute__((__gnu_inline__, __always_inline__, __artificial__))
39_mm512_4dpwssd_epi32 (__m512i __A, __m512i __B, __m512i __C,
40 __m512i __D, __m512i __E, __m128i *__F)
41{
42 return (__m512i) __builtin_ia32_vp4dpwssd ((__v16si) __B,
43 (__v16si) __C,
44 (__v16si) __D,
45 (__v16si) __E,
46 (__v16si) __A,
47 (const __v4si *) __F);
48}
49
50extern __inline __m512i
51__attribute__((__gnu_inline__, __always_inline__, __artificial__))
52_mm512_mask_4dpwssd_epi32 (__m512i __A, __mmask16 __U, __m512i __B,
53 __m512i __C, __m512i __D, __m512i __E,
54 __m128i *__F)
55{
56 return (__m512i) __builtin_ia32_vp4dpwssd_mask ((__v16si) __B,
57 (__v16si) __C,
58 (__v16si) __D,
59 (__v16si) __E,
60 (__v16si) __A,
61 (const __v4si *) __F,
62 (__v16si) __A,
63 (__mmask16) __U);
64}
65
66extern __inline __m512i
67__attribute__((__gnu_inline__, __always_inline__, __artificial__))
68_mm512_maskz_4dpwssd_epi32 (__mmask16 __U, __m512i __A, __m512i __B,
69 __m512i __C, __m512i __D, __m512i __E,
70 __m128i *__F)
71{
72 return (__m512i) __builtin_ia32_vp4dpwssd_mask ((__v16si) __B,
73 (__v16si) __C,
74 (__v16si) __D,
75 (__v16si) __E,
76 (__v16si) __A,
77 (const __v4si *) __F,
78 (__v16si) _mm512_setzero_ps (),
79 (__mmask16) __U);
80}
81
82extern __inline __m512i
83__attribute__((__gnu_inline__, __always_inline__, __artificial__))
84_mm512_4dpwssds_epi32 (__m512i __A, __m512i __B, __m512i __C,
85 __m512i __D, __m512i __E, __m128i *__F)
86{
87 return (__m512i) __builtin_ia32_vp4dpwssds ((__v16si) __B,
88 (__v16si) __C,
89 (__v16si) __D,
90 (__v16si) __E,
91 (__v16si) __A,
92 (const __v4si *) __F);
93}
94
95extern __inline __m512i
96__attribute__((__gnu_inline__, __always_inline__, __artificial__))
97_mm512_mask_4dpwssds_epi32 (__m512i __A, __mmask16 __U, __m512i __B,
98 __m512i __C, __m512i __D, __m512i __E,
99 __m128i *__F)
100{
101 return (__m512i) __builtin_ia32_vp4dpwssds_mask ((__v16si) __B,
102 (__v16si) __C,
103 (__v16si) __D,
104 (__v16si) __E,
105 (__v16si) __A,
106 (const __v4si *) __F,
107 (__v16si) __A,
108 (__mmask16) __U);
109}
110
111extern __inline __m512i
112__attribute__((__gnu_inline__, __always_inline__, __artificial__))
113_mm512_maskz_4dpwssds_epi32 (__mmask16 __U, __m512i __A, __m512i __B,
114 __m512i __C, __m512i __D, __m512i __E,
115 __m128i *__F)
116{
117 return (__m512i) __builtin_ia32_vp4dpwssds_mask ((__v16si) __B,
118 (__v16si) __C,
119 (__v16si) __D,
120 (__v16si) __E,
121 (__v16si) __A,
122 (const __v4si *) __F,
123 (__v16si) _mm512_setzero_ps (),
124 (__mmask16) __U);
125}
126
127#ifdef __DISABLE_AVX5124VNNIW__
128#undef __DISABLE_AVX5124VNNIW__
129#pragma GCC pop_options
130#endif /* __DISABLE_AVX5124VNNIW__ */
131
132#endif /* _AVX5124VNNIWINTRIN_H_INCLUDED */
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