source: Daodan/MSYS2/mingw32/lib/gcc/i686-w64-mingw32/11.2.0/include/avx512bf16intrin.h@ 1175

Last change on this file since 1175 was 1166, checked in by rossy, 3 years ago

Daodan: Replace MinGW build env with an up-to-date MSYS2 env

File size: 3.9 KB
RevLine 
[1166]1/* Copyright (C) 2019-2021 Free Software Foundation, Inc.
2
3 This file is part of GCC.
4
5 GCC is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 3, or (at your option)
8 any later version.
9
10 GCC is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 Under Section 7 of GPL version 3, you are granted additional
16 permissions described in the GCC Runtime Library Exception, version
17 3.1, as published by the Free Software Foundation.
18
19 You should have received a copy of the GNU General Public License and
20 a copy of the GCC Runtime Library Exception along with this program;
21 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
22 <http://www.gnu.org/licenses/>. */
23
24#ifndef _IMMINTRIN_H_INCLUDED
25#error "Never use <avx512bf16intrin.h> directly; include <immintrin.h> instead."
26#endif
27
28#ifndef _AVX512BF16INTRIN_H_INCLUDED
29#define _AVX512BF16INTRIN_H_INCLUDED
30
31#ifndef __AVX512BF16__
32#pragma GCC push_options
33#pragma GCC target("avx512bf16")
34#define __DISABLE_AVX512BF16__
35#endif /* __AVX512BF16__ */
36
37/* Internal data types for implementing the intrinsics. */
38typedef short __v32bh __attribute__ ((__vector_size__ (64)));
39
40/* The Intel API is flexible enough that we must allow aliasing with other
41 vector types, and their scalar components. */
42typedef short __m512bh __attribute__ ((__vector_size__ (64), __may_alias__));
43
44/* vcvtne2ps2bf16 */
45
46extern __inline __m512bh
47__attribute__((__gnu_inline__, __always_inline__, __artificial__))
48_mm512_cvtne2ps_pbh (__m512 __A, __m512 __B)
49{
50 return (__m512bh)__builtin_ia32_cvtne2ps2bf16_v32hi(__A, __B);
51}
52
53extern __inline __m512bh
54__attribute__((__gnu_inline__, __always_inline__, __artificial__))
55_mm512_mask_cvtne2ps_pbh (__m512bh __A, __mmask32 __B, __m512 __C, __m512 __D)
56{
57 return (__m512bh)__builtin_ia32_cvtne2ps2bf16_v32hi_mask(__C, __D, __A, __B);
58}
59
60extern __inline __m512bh
61__attribute__((__gnu_inline__, __always_inline__, __artificial__))
62_mm512_maskz_cvtne2ps_pbh (__mmask32 __A, __m512 __B, __m512 __C)
63{
64 return (__m512bh)__builtin_ia32_cvtne2ps2bf16_v32hi_maskz(__B, __C, __A);
65}
66
67/* vcvtneps2bf16 */
68
69extern __inline __m256bh
70__attribute__((__gnu_inline__, __always_inline__, __artificial__))
71_mm512_cvtneps_pbh (__m512 __A)
72{
73 return (__m256bh)__builtin_ia32_cvtneps2bf16_v16sf(__A);
74}
75
76extern __inline __m256bh
77__attribute__((__gnu_inline__, __always_inline__, __artificial__))
78_mm512_mask_cvtneps_pbh (__m256bh __A, __mmask16 __B, __m512 __C)
79{
80 return (__m256bh)__builtin_ia32_cvtneps2bf16_v16sf_mask(__C, __A, __B);
81}
82
83extern __inline __m256bh
84__attribute__((__gnu_inline__, __always_inline__, __artificial__))
85_mm512_maskz_cvtneps_pbh (__mmask16 __A, __m512 __B)
86{
87 return (__m256bh)__builtin_ia32_cvtneps2bf16_v16sf_maskz(__B, __A);
88}
89
90/* vdpbf16ps */
91
92extern __inline __m512
93__attribute__((__gnu_inline__, __always_inline__, __artificial__))
94_mm512_dpbf16_ps (__m512 __A, __m512bh __B, __m512bh __C)
95{
96 return (__m512)__builtin_ia32_dpbf16ps_v16sf(__A, __B, __C);
97}
98
99extern __inline __m512
100__attribute__((__gnu_inline__, __always_inline__, __artificial__))
101_mm512_mask_dpbf16_ps (__m512 __A, __mmask16 __B, __m512bh __C, __m512bh __D)
102{
103 return (__m512)__builtin_ia32_dpbf16ps_v16sf_mask(__A, __C, __D, __B);
104}
105
106extern __inline __m512
107__attribute__((__gnu_inline__, __always_inline__, __artificial__))
108_mm512_maskz_dpbf16_ps (__mmask16 __A, __m512 __B, __m512bh __C, __m512bh __D)
109{
110 return (__m512)__builtin_ia32_dpbf16ps_v16sf_maskz(__B, __C, __D, __A);
111}
112
113#ifdef __DISABLE_AVX512BF16__
114#undef __DISABLE_AVX512BF16__
115#pragma GCC pop_options
116#endif /* __DISABLE_AVX512BF16__ */
117
118#endif /* _AVX512BF16INTRIN_H_INCLUDED */
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