source: Daodan/MSYS2/mingw32/lib/gcc/i686-w64-mingw32/11.2.0/include/avx512bf16vlintrin.h

Last change on this file was 1166, checked in by rossy, 3 years ago

Daodan: Replace MinGW build env with an up-to-date MSYS2 env
File size: 6.0 KB
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1/* Copyright (C) 2019-2021 Free Software Foundation, Inc.
2
3 This file is part of GCC.
4
5 GCC is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 3, or (at your option)
8 any later version.
9
10 GCC is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 Under Section 7 of GPL version 3, you are granted additional
16 permissions described in the GCC Runtime Library Exception, version
17 3.1, as published by the Free Software Foundation.
18
19 You should have received a copy of the GNU General Public License and
20 a copy of the GCC Runtime Library Exception along with this program;
21 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
22 <http://www.gnu.org/licenses/>. */
23
24#ifndef _IMMINTRIN_H_INCLUDED
25#error "Never use <avx512bf16vlintrin.h> directly; include <immintrin.h> instead."
26#endif
27
28#ifndef _AVX512BF16VLINTRIN_H_INCLUDED
29#define _AVX512BF16VLINTRIN_H_INCLUDED
30
31#if !defined(__AVX512VL__) || !defined(__AVX512BF16__)
32#pragma GCC push_options
33#pragma GCC target("avx512bf16,avx512vl")
34#define __DISABLE_AVX512BF16VL__
35#endif /* __AVX512BF16__ */
36
37/* Internal data types for implementing the intrinsics. */
38typedef short __v16bh __attribute__ ((__vector_size__ (32)));
39typedef short __v8bh __attribute__ ((__vector_size__ (16)));
40
41/* The Intel API is flexible enough that we must allow aliasing with other
42 vector types, and their scalar components. */
43typedef short __m256bh __attribute__ ((__vector_size__ (32), __may_alias__));
44typedef short __m128bh __attribute__ ((__vector_size__ (16), __may_alias__));
45
46/* vcvtne2ps2bf16 */
47
48extern __inline __m256bh
49__attribute__((__gnu_inline__, __always_inline__, __artificial__))
50_mm256_cvtne2ps_pbh (__m256 __A, __m256 __B)
51{
52 return (__m256bh)__builtin_ia32_cvtne2ps2bf16_v16hi(__A, __B);
53}
54
55extern __inline __m256bh
56__attribute__((__gnu_inline__, __always_inline__, __artificial__))
57_mm256_mask_cvtne2ps_pbh (__m256bh __A, __mmask16 __B, __m256 __C, __m256 __D)
58{
59 return (__m256bh)__builtin_ia32_cvtne2ps2bf16_v16hi_mask(__C, __D, __A, __B);
60}
61
62extern __inline __m256bh
63__attribute__((__gnu_inline__, __always_inline__, __artificial__))
64_mm256_maskz_cvtne2ps_pbh (__mmask16 __A, __m256 __B, __m256 __C)
65{
66 return (__m256bh)__builtin_ia32_cvtne2ps2bf16_v16hi_maskz(__B, __C, __A);
67}
68
69extern __inline __m128bh
70__attribute__((__gnu_inline__, __always_inline__, __artificial__))
71_mm_cvtne2ps_pbh (__m128 __A, __m128 __B)
72{
73 return (__m128bh)__builtin_ia32_cvtne2ps2bf16_v8hi(__A, __B);
74}
75
76extern __inline __m128bh
77__attribute__((__gnu_inline__, __always_inline__, __artificial__))
78_mm_mask_cvtne2ps_pbh (__m128bh __A, __mmask8 __B, __m128 __C, __m128 __D)
79{
80 return (__m128bh)__builtin_ia32_cvtne2ps2bf16_v8hi_mask(__C, __D, __A, __B);
81}
82
83extern __inline __m128bh
84__attribute__((__gnu_inline__, __always_inline__, __artificial__))
85_mm_maskz_cvtne2ps_pbh (__mmask8 __A, __m128 __B, __m128 __C)
86{
87 return (__m128bh)__builtin_ia32_cvtne2ps2bf16_v8hi_maskz(__B, __C, __A);
88}
89
90/* vcvtneps2bf16 */
91
92extern __inline __m128bh
93__attribute__((__gnu_inline__, __always_inline__, __artificial__))
94_mm256_cvtneps_pbh (__m256 __A)
95{
96 return (__m128bh)__builtin_ia32_cvtneps2bf16_v8sf(__A);
97}
98
99extern __inline __m128bh
100__attribute__((__gnu_inline__, __always_inline__, __artificial__))
101_mm256_mask_cvtneps_pbh (__m128bh __A, __mmask8 __B, __m256 __C)
102{
103 return (__m128bh)__builtin_ia32_cvtneps2bf16_v8sf_mask(__C, __A, __B);
104}
105
106extern __inline __m128bh
107__attribute__((__gnu_inline__, __always_inline__, __artificial__))
108_mm256_maskz_cvtneps_pbh (__mmask8 __A, __m256 __B)
109{
110 return (__m128bh)__builtin_ia32_cvtneps2bf16_v8sf_maskz(__B, __A);
111}
112
113extern __inline __m128bh
114__attribute__((__gnu_inline__, __always_inline__, __artificial__))
115_mm_cvtneps_pbh (__m128 __A)
116{
117 return (__m128bh)__builtin_ia32_cvtneps2bf16_v4sf(__A);
118}
119
120extern __inline __m128bh
121__attribute__((__gnu_inline__, __always_inline__, __artificial__))
122_mm_mask_cvtneps_pbh (__m128bh __A, __mmask8 __B, __m128 __C)
123{
124 return (__m128bh)__builtin_ia32_cvtneps2bf16_v4sf_mask(__C, __A, __B);
125}
126
127extern __inline __m128bh
128__attribute__((__gnu_inline__, __always_inline__, __artificial__))
129_mm_maskz_cvtneps_pbh (__mmask8 __A, __m128 __B)
130{
131 return (__m128bh)__builtin_ia32_cvtneps2bf16_v4sf_maskz(__B, __A);
132}
133
134/* vdpbf16ps */
135
136extern __inline __m256
137__attribute__((__gnu_inline__, __always_inline__, __artificial__))
138_mm256_dpbf16_ps (__m256 __A, __m256bh __B, __m256bh __C)
139{
140 return (__m256)__builtin_ia32_dpbf16ps_v8sf(__A, __B, __C);
141}
142
143extern __inline __m256
144__attribute__((__gnu_inline__, __always_inline__, __artificial__))
145_mm256_mask_dpbf16_ps (__m256 __A, __mmask8 __B, __m256bh __C, __m256bh __D)
146{
147 return (__m256)__builtin_ia32_dpbf16ps_v8sf_mask(__A, __C, __D, __B);
148}
149
150extern __inline __m256
151__attribute__((__gnu_inline__, __always_inline__, __artificial__))
152_mm256_maskz_dpbf16_ps (__mmask8 __A, __m256 __B, __m256bh __C, __m256bh __D)
153{
154 return (__m256)__builtin_ia32_dpbf16ps_v8sf_maskz(__B, __C, __D, __A);
155}
156
157extern __inline __m128
158__attribute__((__gnu_inline__, __always_inline__, __artificial__))
159_mm_dpbf16_ps (__m128 __A, __m128bh __B, __m128bh __C)
160{
161 return (__m128)__builtin_ia32_dpbf16ps_v4sf(__A, __B, __C);
162}
163
164extern __inline __m128
165__attribute__((__gnu_inline__, __always_inline__, __artificial__))
166_mm_mask_dpbf16_ps (__m128 __A, __mmask8 __B, __m128bh __C, __m128bh __D)
167{
168 return (__m128)__builtin_ia32_dpbf16ps_v4sf_mask(__A, __C, __D, __B);
169}
170
171extern __inline __m128
172__attribute__((__gnu_inline__, __always_inline__, __artificial__))
173_mm_maskz_dpbf16_ps (__mmask8 __A, __m128 __B, __m128bh __C, __m128bh __D)
174{
175 return (__m128)__builtin_ia32_dpbf16ps_v4sf_maskz(__B, __C, __D, __A);
176}
177
178#ifdef __DISABLE_AVX512BF16VL__
179#undef __DISABLE_AVX512BF16VL__
180#pragma GCC pop_options
181#endif /* __DISABLE_AVX512BF16VL__ */
182
183#endif /* _AVX512BF16VLINTRIN_H_INCLUDED */
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