source: Daodan/MSYS2/mingw32/lib/gcc/i686-w64-mingw32/11.2.0/include/ia32intrin.h@ 1171

Last change on this file since 1171 was 1166, checked in by rossy, 3 years ago

Daodan: Replace MinGW build env with an up-to-date MSYS2 env

File size: 7.5 KB
Line 
1/* Copyright (C) 2009-2021 Free Software Foundation, Inc.
2
3 This file is part of GCC.
4
5 GCC is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 3, or (at your option)
8 any later version.
9
10 GCC is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 Under Section 7 of GPL version 3, you are granted additional
16 permissions described in the GCC Runtime Library Exception, version
17 3.1, as published by the Free Software Foundation.
18
19 You should have received a copy of the GNU General Public License and
20 a copy of the GCC Runtime Library Exception along with this program;
21 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
22 <http://www.gnu.org/licenses/>. */
23
24#ifndef _X86GPRINTRIN_H_INCLUDED
25# error "Never use <ia32intrin.h> directly; include <x86gprintrin.h> instead."
26#endif
27
28/* 32bit bsf */
29extern __inline int
30__attribute__((__gnu_inline__, __always_inline__, __artificial__))
31__bsfd (int __X)
32{
33 return __builtin_ctz (__X);
34}
35
36/* 32bit bsr */
37extern __inline int
38__attribute__((__gnu_inline__, __always_inline__, __artificial__))
39__bsrd (int __X)
40{
41 return __builtin_ia32_bsrsi (__X);
42}
43
44/* 32bit bswap */
45extern __inline int
46__attribute__((__gnu_inline__, __always_inline__, __artificial__))
47__bswapd (int __X)
48{
49 return __builtin_bswap32 (__X);
50}
51
52#ifndef __iamcu__
53
54#ifndef __SSE4_2__
55#pragma GCC push_options
56#pragma GCC target("sse4.2")
57#define __DISABLE_SSE4_2__
58#endif /* __SSE4_2__ */
59
60/* 32bit accumulate CRC32 (polynomial 0x11EDC6F41) value. */
61extern __inline unsigned int
62__attribute__((__gnu_inline__, __always_inline__, __artificial__))
63__crc32b (unsigned int __C, unsigned char __V)
64{
65 return __builtin_ia32_crc32qi (__C, __V);
66}
67
68extern __inline unsigned int
69__attribute__((__gnu_inline__, __always_inline__, __artificial__))
70__crc32w (unsigned int __C, unsigned short __V)
71{
72 return __builtin_ia32_crc32hi (__C, __V);
73}
74
75extern __inline unsigned int
76__attribute__((__gnu_inline__, __always_inline__, __artificial__))
77__crc32d (unsigned int __C, unsigned int __V)
78{
79 return __builtin_ia32_crc32si (__C, __V);
80}
81
82#ifdef __DISABLE_SSE4_2__
83#undef __DISABLE_SSE4_2__
84#pragma GCC pop_options
85#endif /* __DISABLE_SSE4_2__ */
86
87#endif /* __iamcu__ */
88
89/* 32bit popcnt */
90extern __inline int
91__attribute__((__gnu_inline__, __always_inline__, __artificial__))
92__popcntd (unsigned int __X)
93{
94 return __builtin_popcount (__X);
95}
96
97#ifndef __iamcu__
98
99/* rdpmc */
100extern __inline unsigned long long
101__attribute__((__gnu_inline__, __always_inline__, __artificial__))
102__rdpmc (int __S)
103{
104 return __builtin_ia32_rdpmc (__S);
105}
106
107#endif /* __iamcu__ */
108
109/* rdtsc */
110#define __rdtsc() __builtin_ia32_rdtsc ()
111
112#ifndef __iamcu__
113
114/* rdtscp */
115#define __rdtscp(a) __builtin_ia32_rdtscp (a)
116
117#endif /* __iamcu__ */
118
119/* 8bit rol */
120extern __inline unsigned char
121__attribute__((__gnu_inline__, __always_inline__, __artificial__))
122__rolb (unsigned char __X, int __C)
123{
124 return __builtin_ia32_rolqi (__X, __C);
125}
126
127/* 16bit rol */
128extern __inline unsigned short
129__attribute__((__gnu_inline__, __always_inline__, __artificial__))
130__rolw (unsigned short __X, int __C)
131{
132 return __builtin_ia32_rolhi (__X, __C);
133}
134
135/* 32bit rol */
136extern __inline unsigned int
137__attribute__((__gnu_inline__, __always_inline__, __artificial__))
138__rold (unsigned int __X, int __C)
139{
140 __C &= 31;
141 return (__X << __C) | (__X >> (-__C & 31));
142}
143
144/* 8bit ror */
145extern __inline unsigned char
146__attribute__((__gnu_inline__, __always_inline__, __artificial__))
147__rorb (unsigned char __X, int __C)
148{
149 return __builtin_ia32_rorqi (__X, __C);
150}
151
152/* 16bit ror */
153extern __inline unsigned short
154__attribute__((__gnu_inline__, __always_inline__, __artificial__))
155__rorw (unsigned short __X, int __C)
156{
157 return __builtin_ia32_rorhi (__X, __C);
158}
159
160/* 32bit ror */
161extern __inline unsigned int
162__attribute__((__gnu_inline__, __always_inline__, __artificial__))
163__rord (unsigned int __X, int __C)
164{
165 __C &= 31;
166 return (__X >> __C) | (__X << (-__C & 31));
167}
168
169/* Pause */
170extern __inline void
171__attribute__((__gnu_inline__, __always_inline__, __artificial__))
172__pause (void)
173{
174 __builtin_ia32_pause ();
175}
176
177#ifdef __x86_64__
178/* 64bit bsf */
179extern __inline int
180__attribute__((__gnu_inline__, __always_inline__, __artificial__))
181__bsfq (long long __X)
182{
183 return __builtin_ctzll (__X);
184}
185
186/* 64bit bsr */
187extern __inline int
188__attribute__((__gnu_inline__, __always_inline__, __artificial__))
189__bsrq (long long __X)
190{
191 return __builtin_ia32_bsrdi (__X);
192}
193
194/* 64bit bswap */
195extern __inline long long
196__attribute__((__gnu_inline__, __always_inline__, __artificial__))
197__bswapq (long long __X)
198{
199 return __builtin_bswap64 (__X);
200}
201
202#ifndef __SSE4_2__
203#pragma GCC push_options
204#pragma GCC target("sse4.2")
205#define __DISABLE_SSE4_2__
206#endif /* __SSE4_2__ */
207
208/* 64bit accumulate CRC32 (polynomial 0x11EDC6F41) value. */
209extern __inline unsigned long long
210__attribute__((__gnu_inline__, __always_inline__, __artificial__))
211__crc32q (unsigned long long __C, unsigned long long __V)
212{
213 return __builtin_ia32_crc32di (__C, __V);
214}
215
216#ifdef __DISABLE_SSE4_2__
217#undef __DISABLE_SSE4_2__
218#pragma GCC pop_options
219#endif /* __DISABLE_SSE4_2__ */
220
221/* 64bit popcnt */
222extern __inline long long
223__attribute__((__gnu_inline__, __always_inline__, __artificial__))
224__popcntq (unsigned long long __X)
225{
226 return __builtin_popcountll (__X);
227}
228
229/* 64bit rol */
230extern __inline unsigned long long
231__attribute__((__gnu_inline__, __always_inline__, __artificial__))
232__rolq (unsigned long long __X, int __C)
233{
234 __C &= 63;
235 return (__X << __C) | (__X >> (-__C & 63));
236}
237
238/* 64bit ror */
239extern __inline unsigned long long
240__attribute__((__gnu_inline__, __always_inline__, __artificial__))
241__rorq (unsigned long long __X, int __C)
242{
243 __C &= 63;
244 return (__X >> __C) | (__X << (-__C & 63));
245}
246
247/* Read flags register */
248extern __inline unsigned long long
249__attribute__((__gnu_inline__, __always_inline__, __artificial__))
250__readeflags (void)
251{
252 return __builtin_ia32_readeflags_u64 ();
253}
254
255/* Write flags register */
256extern __inline void
257__attribute__((__gnu_inline__, __always_inline__, __artificial__))
258__writeeflags (unsigned long long __X)
259{
260 __builtin_ia32_writeeflags_u64 (__X);
261}
262
263#define _bswap64(a) __bswapq(a)
264#define _popcnt64(a) __popcntq(a)
265#else
266
267/* Read flags register */
268extern __inline unsigned int
269__attribute__((__gnu_inline__, __always_inline__, __artificial__))
270__readeflags (void)
271{
272 return __builtin_ia32_readeflags_u32 ();
273}
274
275/* Write flags register */
276extern __inline void
277__attribute__((__gnu_inline__, __always_inline__, __artificial__))
278__writeeflags (unsigned int __X)
279{
280 __builtin_ia32_writeeflags_u32 (__X);
281}
282
283#endif
284
285/* On LP64 systems, longs are 64-bit. Use the appropriate rotate
286 * function. */
287#ifdef __LP64__
288#define _lrotl(a,b) __rolq((a), (b))
289#define _lrotr(a,b) __rorq((a), (b))
290#else
291#define _lrotl(a,b) __rold((a), (b))
292#define _lrotr(a,b) __rord((a), (b))
293#endif
294
295#define _bit_scan_forward(a) __bsfd(a)
296#define _bit_scan_reverse(a) __bsrd(a)
297#define _bswap(a) __bswapd(a)
298#define _popcnt32(a) __popcntd(a)
299#ifndef __iamcu__
300#define _rdpmc(a) __rdpmc(a)
301#define _rdtscp(a) __rdtscp(a)
302#endif /* __iamcu__ */
303#define _rdtsc() __rdtsc()
304#define _rotwl(a,b) __rolw((a), (b))
305#define _rotwr(a,b) __rorw((a), (b))
306#define _rotl(a,b) __rold((a), (b))
307#define _rotr(a,b) __rord((a), (b))
Note: See TracBrowser for help on using the repository browser.