source: Daodan/MinGW/include/ddk/ntddser.h@ 1063

Last change on this file since 1063 was 1046, checked in by alloc, 8 years ago

Daodan: Added Windows MinGW and build batch file

File size: 16.8 KB
Line 
1/*
2 * ntddser.h
3 *
4 * Serial port driver interface
5 *
6 * This file is part of the w32api package.
7 *
8 * Contributors:
9 * Created by Casper S. Hornstrup <chorns@users.sourceforge.net>
10 *
11 * THIS SOFTWARE IS NOT COPYRIGHTED
12 *
13 * This source code is offered for use in the public domain. You may
14 * use, modify or distribute it freely.
15 *
16 * This code is distributed in the hope that it will be useful but
17 * WITHOUT ANY WARRANTY. ALL WARRANTIES, EXPRESS OR IMPLIED ARE HEREBY
18 * DISCLAIMED. This includes but is not limited to warranties of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
20 *
21 */
22
23#ifndef __NTDDSER_H
24#define __NTDDSER_H
25
26#if __GNUC__ >=3
27#pragma GCC system_header
28#endif
29
30#ifdef __cplusplus
31extern "C" {
32#endif
33
34#include "ntddk.h"
35
36/* GUIDs */
37
38DEFINE_GUID(GUID_DEVINTERFACE_COMPORT,
39 0x86e0d1e0L, 0x8089, 0x11d0, 0x9c, 0xe4, 0x08, 0x00, 0x3e, 0x30, 0x1f, 0x73);
40
41DEFINE_GUID(GUID_DEVINTERFACE_SERENUM_BUS_ENUMERATOR,
42 0x4D36E978L, 0xE325, 0x11CE, 0xBF, 0xC1, 0x08, 0x00, 0x2B, 0xE1, 0x03, 0x18);
43
44#define IOCTL_SERIAL_CLEAR_STATS \
45 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 36, METHOD_BUFFERED, FILE_ANY_ACCESS)
46#define IOCTL_SERIAL_CLR_DTR \
47 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 10, METHOD_BUFFERED, FILE_ANY_ACCESS)
48#define IOCTL_SERIAL_CLR_RTS \
49 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 13, METHOD_BUFFERED, FILE_ANY_ACCESS)
50#define IOCTL_SERIAL_CONFIG_SIZE \
51 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 32, METHOD_BUFFERED, FILE_ANY_ACCESS)
52#define IOCTL_SERIAL_GET_BAUD_RATE \
53 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 20, METHOD_BUFFERED, FILE_ANY_ACCESS)
54#define IOCTL_SERIAL_GET_CHARS \
55 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 22, METHOD_BUFFERED, FILE_ANY_ACCESS)
56#define IOCTL_SERIAL_GET_COMMSTATUS \
57 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 27, METHOD_BUFFERED, FILE_ANY_ACCESS)
58#define IOCTL_SERIAL_GET_DTRRTS \
59 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 30, METHOD_BUFFERED, FILE_ANY_ACCESS)
60#define IOCTL_SERIAL_GET_HANDFLOW \
61 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 24, METHOD_BUFFERED, FILE_ANY_ACCESS)
62#define IOCTL_SERIAL_GET_LINE_CONTROL \
63 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 21, METHOD_BUFFERED, FILE_ANY_ACCESS)
64#define IOCTL_SERIAL_GET_MODEM_CONTROL \
65 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 37, METHOD_BUFFERED, FILE_ANY_ACCESS)
66#define IOCTL_SERIAL_GET_MODEMSTATUS \
67 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 26, METHOD_BUFFERED, FILE_ANY_ACCESS)
68#define IOCTL_SERIAL_GET_PROPERTIES \
69 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 29, METHOD_BUFFERED, FILE_ANY_ACCESS)
70#define IOCTL_SERIAL_GET_STATS \
71 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 35, METHOD_BUFFERED, FILE_ANY_ACCESS)
72#define IOCTL_SERIAL_GET_TIMEOUTS \
73 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 8, METHOD_BUFFERED, FILE_ANY_ACCESS)
74#define IOCTL_SERIAL_GET_WAIT_MASK \
75 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 16, METHOD_BUFFERED, FILE_ANY_ACCESS)
76#define IOCTL_SERIAL_IMMEDIATE_CHAR \
77 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 6, METHOD_BUFFERED, FILE_ANY_ACCESS)
78#define IOCTL_SERIAL_LSRMST_INSERT \
79 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 31, METHOD_BUFFERED, FILE_ANY_ACCESS)
80#define IOCTL_SERIAL_PURGE \
81 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 19, METHOD_BUFFERED, FILE_ANY_ACCESS)
82#define IOCTL_SERIAL_RESET_DEVICE \
83 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 11, METHOD_BUFFERED, FILE_ANY_ACCESS)
84#define IOCTL_SERIAL_SET_BAUD_RATE \
85 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 1, METHOD_BUFFERED, FILE_ANY_ACCESS)
86#define IOCTL_SERIAL_SET_BREAK_ON \
87 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 4, METHOD_BUFFERED, FILE_ANY_ACCESS)
88#define IOCTL_SERIAL_SET_BREAK_OFF \
89 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 5, METHOD_BUFFERED, FILE_ANY_ACCESS)
90#define IOCTL_SERIAL_SET_CHARS \
91 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 23, METHOD_BUFFERED, FILE_ANY_ACCESS)
92#define IOCTL_SERIAL_SET_DTR \
93 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 9, METHOD_BUFFERED, FILE_ANY_ACCESS)
94#define IOCTL_SERIAL_SET_FIFO_CONTROL \
95 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 39, METHOD_BUFFERED, FILE_ANY_ACCESS)
96#define IOCTL_SERIAL_SET_HANDFLOW \
97 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 25, METHOD_BUFFERED, FILE_ANY_ACCESS)
98#define IOCTL_SERIAL_SET_LINE_CONTROL \
99 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 3, METHOD_BUFFERED, FILE_ANY_ACCESS)
100#define IOCTL_SERIAL_SET_MODEM_CONTROL \
101 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 38, METHOD_BUFFERED, FILE_ANY_ACCESS)
102#define IOCTL_SERIAL_SET_QUEUE_SIZE \
103 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 2, METHOD_BUFFERED, FILE_ANY_ACCESS)
104#define IOCTL_SERIAL_SET_RTS \
105 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 12, METHOD_BUFFERED, FILE_ANY_ACCESS)
106#define IOCTL_SERIAL_SET_TIMEOUTS \
107 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 7, METHOD_BUFFERED, FILE_ANY_ACCESS)
108#define IOCTL_SERIAL_SET_WAIT_MASK \
109 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 17, METHOD_BUFFERED, FILE_ANY_ACCESS)
110#define IOCTL_SERIAL_SET_XOFF \
111 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 14, METHOD_BUFFERED, FILE_ANY_ACCESS)
112#define IOCTL_SERIAL_SET_XON \
113 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 15, METHOD_BUFFERED, FILE_ANY_ACCESS)
114#define IOCTL_SERIAL_WAIT_ON_MASK \
115 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 18, METHOD_BUFFERED, FILE_ANY_ACCESS)
116#define IOCTL_SERIAL_XOFF_COUNTER \
117 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 28, METHOD_BUFFERED, FILE_ANY_ACCESS)
118
119#define IOCTL_SERIAL_INTERNAL_BASIC_SETTINGS \
120 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 3, METHOD_BUFFERED, FILE_ANY_ACCESS)
121#define IOCTL_SERIAL_INTERNAL_CANCEL_WAIT_WAKE \
122 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 2, METHOD_BUFFERED, FILE_ANY_ACCESS)
123#define IOCTL_SERIAL_INTERNAL_DO_WAIT_WAKE \
124 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 1, METHOD_BUFFERED, FILE_ANY_ACCESS)
125#define IOCTL_SERIAL_INTERNAL_RESTORE_SETTINGS \
126 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 4, METHOD_BUFFERED, FILE_ANY_ACCESS)
127
128#define IOCTL_SERENUM_PORT_DESC \
129 CTL_CODE (FILE_DEVICE_SERENUM, 130, METHOD_BUFFERED, FILE_ANY_ACCESS)
130#define IOCTL_SERENUM_GET_PORT_NAME \
131 CTL_CODE (FILE_DEVICE_SERENUM, 131, METHOD_BUFFERED, FILE_ANY_ACCESS)
132
133#define IOCTL_INTERNAL_SERENUM_REMOVE_SELF \
134 CTL_CODE (FILE_DEVICE_SERENUM, 129, METHOD_NEITHER, FILE_ANY_ACCESS)
135
136
137typedef struct _SERIAL_BAUD_RATE {
138 ULONG BaudRate;
139} SERIAL_BAUD_RATE, *PSERIAL_BAUD_RATE;
140
141/* SERIAL_BAUD_RATE.BaudRate constants */
142#define SERIAL_BAUD_075 0x00000001
143#define SERIAL_BAUD_110 0x00000002
144#define SERIAL_BAUD_134_5 0x00000004
145#define SERIAL_BAUD_150 0x00000008
146#define SERIAL_BAUD_300 0x00000010
147#define SERIAL_BAUD_600 0x00000020
148#define SERIAL_BAUD_1200 0x00000040
149#define SERIAL_BAUD_1800 0x00000080
150#define SERIAL_BAUD_2400 0x00000100
151#define SERIAL_BAUD_4800 0x00000200
152#define SERIAL_BAUD_7200 0x00000400
153#define SERIAL_BAUD_9600 0x00000800
154#define SERIAL_BAUD_14400 0x00001000
155#define SERIAL_BAUD_19200 0x00002000
156#define SERIAL_BAUD_38400 0x00004000
157#define SERIAL_BAUD_56K 0x00008000
158#define SERIAL_BAUD_128K 0x00010000
159#define SERIAL_BAUD_115200 0x00020000
160#define SERIAL_BAUD_57600 0x00040000
161#define SERIAL_BAUD_USER 0x10000000
162
163typedef struct _SERIAL_CHARS {
164 UCHAR EofChar;
165 UCHAR ErrorChar;
166 UCHAR BreakChar;
167 UCHAR EventChar;
168 UCHAR XonChar;
169 UCHAR XoffChar;
170} SERIAL_CHARS, *PSERIAL_CHARS;
171
172typedef struct _SERIAL_STATUS {
173 ULONG Errors;
174 ULONG HoldReasons;
175 ULONG AmountInInQueue;
176 ULONG AmountInOutQueue;
177 BOOLEAN EofReceived;
178 BOOLEAN WaitForImmediate;
179} SERIAL_STATUS, *PSERIAL_STATUS;
180
181typedef struct _SERIAL_HANDFLOW {
182 ULONG ControlHandShake;
183 ULONG FlowReplace;
184 LONG XonLimit;
185 LONG XoffLimit;
186} SERIAL_HANDFLOW, *PSERIAL_HANDFLOW;
187
188#define SERIAL_DTR_MASK 0x00000003
189#define SERIAL_DTR_CONTROL 0x00000001
190#define SERIAL_DTR_HANDSHAKE 0x00000002
191#define SERIAL_CTS_HANDSHAKE 0x00000008
192#define SERIAL_DSR_HANDSHAKE 0x00000010
193#define SERIAL_DCD_HANDSHAKE 0x00000020
194#define SERIAL_OUT_HANDSHAKEMASK 0x00000038
195#define SERIAL_DSR_SENSITIVITY 0x00000040
196#define SERIAL_ERROR_ABORT 0x80000000
197#define SERIAL_CONTROL_INVALID 0x7fffff84
198#define SERIAL_AUTO_TRANSMIT 0x00000001
199#define SERIAL_AUTO_RECEIVE 0x00000002
200#define SERIAL_ERROR_CHAR 0x00000004
201#define SERIAL_NULL_STRIPPING 0x00000008
202#define SERIAL_BREAK_CHAR 0x00000010
203#define SERIAL_RTS_MASK 0x000000c0
204#define SERIAL_RTS_CONTROL 0x00000040
205#define SERIAL_RTS_HANDSHAKE 0x00000080
206#define SERIAL_TRANSMIT_TOGGLE 0x000000c0
207#define SERIAL_XOFF_CONTINUE 0x80000000
208#define SERIAL_FLOW_INVALID 0x7fffff20
209
210typedef struct _SERIAL_LINE_CONTROL {
211 UCHAR StopBits;
212 UCHAR Parity;
213 UCHAR WordLength;
214} SERIAL_LINE_CONTROL, *PSERIAL_LINE_CONTROL;
215
216/* SERIAL_LINE_CONTROL.StopBits constants */
217#define STOP_BIT_1 0x00
218#define STOP_BITS_1_5 0x01
219#define STOP_BITS_2 0x02
220
221/* SERIAL_LINE_CONTROL.Parity constants */
222#define NO_PARITY 0x00
223#define ODD_PARITY 0x01
224#define EVEN_PARITY 0x02
225#define MARK_PARITY 0x03
226#define SPACE_PARITY 0x04
227
228/* IOCTL_SERIAL_(GET_MODEM_CONTROL, SET_MODEM_CONTROL) flags */
229#define SERIAL_IOC_MCR_DTR 0x00000001
230#define SERIAL_IOC_MCR_RTS 0x00000002
231#define SERIAL_IOC_MCR_OUT1 0x00000004
232#define SERIAL_IOC_MCR_OUT2 0x00000008
233#define SERIAL_IOC_MCR_LOOP 0x00000010
234
235typedef struct _SERIAL_COMMPROP {
236 USHORT PacketLength;
237 USHORT PacketVersion;
238 ULONG ServiceMask;
239 ULONG Reserved1;
240 ULONG MaxTxQueue;
241 ULONG MaxRxQueue;
242 ULONG MaxBaud;
243 ULONG ProvSubType;
244 ULONG ProvCapabilities;
245 ULONG SettableParams;
246 ULONG SettableBaud;
247 USHORT SettableData;
248 USHORT SettableStopParity;
249 ULONG CurrentTxQueue;
250 ULONG CurrentRxQueue;
251 ULONG ProvSpec1;
252 ULONG ProvSpec2;
253 WCHAR ProvChar[1];
254} SERIAL_COMMPROP, *PSERIAL_COMMPROP;
255
256/* SERIAL_COMMPROP.SettableParams flags */
257#define SERIAL_SP_PARITY 0x0001
258#define SERIAL_SP_BAUD 0x0002
259#define SERIAL_SP_DATABITS 0x0004
260#define SERIAL_SP_STOPBITS 0x0008
261#define SERIAL_SP_HANDSHAKING 0x0010
262#define SERIAL_SP_PARITY_CHECK 0x0020
263#define SERIAL_SP_CARRIER_DETECT 0x0040
264
265/* SERIAL_COMMPROP.ProvCapabilities flags */
266#define SERIAL_PCF_DTRDSR 0x00000001
267#define SERIAL_PCF_RTSCTS 0x00000002
268#define SERIAL_PCF_CD 0x00000004
269#define SERIAL_PCF_PARITY_CHECK 0x00000008
270#define SERIAL_PCF_XONXOFF 0x00000010
271#define SERIAL_PCF_SETXCHAR 0x00000020
272#define SERIAL_PCF_TOTALTIMEOUTS 0x00000040
273#define SERIAL_PCF_INTTIMEOUTS 0x00000080
274#define SERIAL_PCF_SPECIALCHARS 0x00000100
275#define SERIAL_PCF_16BITMODE 0x00000200
276
277/* SERIAL_COMMPROP.SettableData flags */
278#define SERIAL_DATABITS_5 0x0001
279#define SERIAL_DATABITS_6 0x0002
280#define SERIAL_DATABITS_7 0x0004
281#define SERIAL_DATABITS_8 0x0008
282#define SERIAL_DATABITS_16 0x0010
283#define SERIAL_DATABITS_16X 0x0020
284
285/* SERIAL_COMMPROP.SettableStopParity flags */
286#define SERIAL_STOPBITS_10 0x0001
287#define SERIAL_STOPBITS_15 0x0002
288#define SERIAL_STOPBITS_20 0x0004
289#define SERIAL_PARITY_NONE 0x0100
290#define SERIAL_PARITY_ODD 0x0200
291#define SERIAL_PARITY_EVEN 0x0400
292#define SERIAL_PARITY_MARK 0x0800
293#define SERIAL_PARITY_SPACE 0x1000
294
295typedef struct _SERIALPERF_STATS {
296 ULONG ReceivedCount;
297 ULONG TransmittedCount;
298 ULONG FrameErrorCount;
299 ULONG SerialOverrunErrorCount;
300 ULONG BufferOverrunErrorCount;
301 ULONG ParityErrorCount;
302} SERIALPERF_STATS, *PSERIALPERF_STATS;
303
304typedef struct _SERIAL_TIMEOUTS {
305 ULONG ReadIntervalTimeout;
306 ULONG ReadTotalTimeoutMultiplier;
307 ULONG ReadTotalTimeoutConstant;
308 ULONG WriteTotalTimeoutMultiplier;
309 ULONG WriteTotalTimeoutConstant;
310} SERIAL_TIMEOUTS, *PSERIAL_TIMEOUTS;
311
312/* IOCTL_SERIAL_(GET_WAIT_MASK, SET_WAIT_MASK, WAIT_ON_MASK) flags */
313#define SERIAL_EV_RXCHAR 0x0001
314#define SERIAL_EV_RXFLAG 0x0002
315#define SERIAL_EV_TXEMPTY 0x0004
316#define SERIAL_EV_CTS 0x0008
317#define SERIAL_EV_DSR 0x0010
318#define SERIAL_EV_RLSD 0x0020
319#define SERIAL_EV_BREAK 0x0040
320#define SERIAL_EV_ERR 0x0080
321#define SERIAL_EV_RING 0x0100
322#define SERIAL_EV_PERR 0x0200
323#define SERIAL_EV_RX80FULL 0x0400
324#define SERIAL_EV_EVENT1 0x0800
325#define SERIAL_EV_EVENT2 0x1000
326
327/* IOCTL_SERIAL_LSRMST_INSERT constants */
328#define SERIAL_LSRMST_LSR_DATA 0x01
329#define SERIAL_LSRMST_LSR_NODATA 0x02
330#define SERIAL_LSRMST_MST 0x03
331#define SERIAL_LSRMST_ESCAPE 0x00
332
333/* IOCTL_SERIAL_PURGE constants */
334#define SERIAL_PURGE_TXABORT 0x00000001
335#define SERIAL_PURGE_RXABORT 0x00000002
336#define SERIAL_PURGE_TXCLEAR 0x00000004
337#define SERIAL_PURGE_RXCLEAR 0x00000008
338
339/* IOCTL_SERIAL_SET_FIFO_CONTROL constants */
340#define SERIAL_IOC_FCR_FIFO_ENABLE 0x00000001
341#define SERIAL_IOC_FCR_RCVR_RESET 0x00000002
342#define SERIAL_IOC_FCR_XMIT_RESET 0x00000004
343#define SERIAL_IOC_FCR_DMA_MODE 0x00000008
344#define SERIAL_IOC_FCR_RES1 0x00000010
345#define SERIAL_IOC_FCR_RES2 0x00000020
346#define SERIAL_IOC_FCR_RCVR_TRIGGER_LSB 0x00000040
347#define SERIAL_IOC_FCR_RCVR_TRIGGER_MSB 0x00000080
348
349typedef struct _SERIAL_QUEUE_SIZE {
350 ULONG InSize;
351 ULONG OutSize;
352} SERIAL_QUEUE_SIZE, *PSERIAL_QUEUE_SIZE;
353
354typedef struct _SERIAL_XOFF_COUNTER {
355 ULONG Timeout;
356 LONG Counter;
357 UCHAR XoffChar;
358} SERIAL_XOFF_COUNTER, *PSERIAL_XOFF_COUNTER;
359
360typedef struct _SERIAL_BASIC_SETTINGS {
361 SERIAL_TIMEOUTS Timeouts;
362 SERIAL_HANDFLOW HandFlow;
363 ULONG RxFifo;
364 ULONG TxFifo;
365} SERIAL_BASIC_SETTINGS, *PSERIAL_BASIC_SETTINGS;
366
367typedef struct _SERENUM_PORT_DESC {
368 ULONG Size;
369 PVOID PortHandle;
370 PHYSICAL_ADDRESS PortAddress;
371 USHORT Reserved[1];
372} SERENUM_PORT_DESC, *PSERENUM_PORT_DESC;
373
374typedef UCHAR STDCALL
375(*PSERENUM_READPORT)(
376 PVOID SerPortAddress);
377
378typedef VOID STDCALL
379(*PSERENUM_WRITEPORT)(
380 PVOID SerPortAddress,
381 UCHAR Value);
382
383typedef enum _SERENUM_PORTION {
384 SerenumFirstHalf,
385 SerenumSecondHalf,
386 SerenumWhole
387} SERENUM_PORTION;
388
389typedef struct _SERENUM_PORT_PARAMETERS {
390 ULONG Size;
391 PSERENUM_READPORT ReadAccessor;
392 PSERENUM_WRITEPORT WriteAccessor;
393 PVOID SerPortAddress;
394 PVOID HardwareHandle;
395 SERENUM_PORTION Portion;
396 USHORT NumberAxis;
397 USHORT Reserved[3];
398} SERENUM_PORT_PARAMETERS, *PSERENUM_PORT_PARAMETERS;
399
400#define SERIAL_ERROR_BREAK 0x00000001
401#define SERIAL_ERROR_FRAMING 0x00000002
402#define SERIAL_ERROR_OVERRUN 0x00000004
403#define SERIAL_ERROR_QUEUEOVERRUN 0x00000008
404#define SERIAL_ERROR_PARITY 0x00000010
405
406#define SERIAL_SP_UNSPECIFIED 0x00000000
407#define SERIAL_SP_RS232 0x00000001
408#define SERIAL_SP_PARALLEL 0x00000002
409#define SERIAL_SP_RS422 0x00000003
410#define SERIAL_SP_RS423 0x00000004
411#define SERIAL_SP_RS449 0x00000005
412#define SERIAL_SP_MODEM 0X00000006
413#define SERIAL_SP_FAX 0x00000021
414#define SERIAL_SP_SCANNER 0x00000022
415#define SERIAL_SP_BRIDGE 0x00000100
416#define SERIAL_SP_LAT 0x00000101
417#define SERIAL_SP_TELNET 0x00000102
418#define SERIAL_SP_X25 0x00000103
419#define SERIAL_SP_SERIALCOMM 0x00000001
420
421#define SERIAL_TX_WAITING_FOR_CTS 0x00000001
422#define SERIAL_TX_WAITING_FOR_DSR 0x00000002
423#define SERIAL_TX_WAITING_FOR_DCD 0x00000004
424#define SERIAL_TX_WAITING_FOR_XON 0x00000008
425#define SERIAL_TX_WAITING_XOFF_SENT 0x00000010
426#define SERIAL_TX_WAITING_ON_BREAK 0x00000020
427#define SERIAL_RX_WAITING_FOR_DSR 0x00000040
428
429#define SERIAL_DTR_STATE 0x00000001
430#define SERIAL_RTS_STATE 0x00000002
431#define SERIAL_CTS_STATE 0x00000010
432#define SERIAL_DSR_STATE 0x00000020
433#define SERIAL_RI_STATE 0x00000040
434#define SERIAL_DCD_STATE 0x00000080
435
436typedef struct _SERIALCONFIG {
437 ULONG Size;
438 USHORT Version;
439 ULONG SubType;
440 ULONG ProvOffset;
441 ULONG ProviderSize;
442 WCHAR ProviderData[1];
443} SERIALCONFIG,*PSERIALCONFIG;
444
445#ifdef __cplusplus
446}
447#endif
448
449#endif /* __NTDDSER_H */
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